|
@@ -30,8 +30,8 @@
|
|
|
#include <linux/mm.h>
|
|
|
#include <linux/sched.h>
|
|
|
|
|
|
-#define OFFSETA(x) (((x) - dev->bank1) >> MFC_OFFSET_SHIFT)
|
|
|
-#define OFFSETB(x) (((x) - dev->bank2) >> MFC_OFFSET_SHIFT)
|
|
|
+#define OFFSETA(x) (((x) - dev->dma_base[BANK1_CTX]) >> MFC_OFFSET_SHIFT)
|
|
|
+#define OFFSETB(x) (((x) - dev->dma_base[BANK2_CTX]) >> MFC_OFFSET_SHIFT)
|
|
|
|
|
|
/* Allocate temporary buffers for decoding */
|
|
|
static int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx)
|
|
@@ -41,8 +41,8 @@ static int s5p_mfc_alloc_dec_temp_buffers_v5(struct s5p_mfc_ctx *ctx)
|
|
|
int ret;
|
|
|
|
|
|
ctx->dsc.size = buf_size->dsc;
|
|
|
- ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX], dev->bank1,
|
|
|
- &ctx->dsc);
|
|
|
+ ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX],
|
|
|
+ dev->dma_base[BANK1_CTX], &ctx->dsc);
|
|
|
if (ret) {
|
|
|
mfc_err("Failed to allocate temporary buffer\n");
|
|
|
return ret;
|
|
@@ -174,7 +174,7 @@ static int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
|
|
|
if (ctx->bank1.size > 0) {
|
|
|
|
|
|
ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX],
|
|
|
- dev->bank1, &ctx->bank1);
|
|
|
+ dev->dma_base[BANK1_CTX], &ctx->bank1);
|
|
|
if (ret) {
|
|
|
mfc_err("Failed to allocate Bank1 temporary buffer\n");
|
|
|
return ret;
|
|
@@ -184,7 +184,7 @@ static int s5p_mfc_alloc_codec_buffers_v5(struct s5p_mfc_ctx *ctx)
|
|
|
/* Allocate only if memory from bank 2 is necessary */
|
|
|
if (ctx->bank2.size > 0) {
|
|
|
ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK2_CTX],
|
|
|
- dev->bank2, &ctx->bank2);
|
|
|
+ dev->dma_base[BANK2_CTX], &ctx->bank2);
|
|
|
if (ret) {
|
|
|
mfc_err("Failed to allocate Bank2 temporary buffer\n");
|
|
|
s5p_mfc_release_priv_buf(ctx->dev->mem_dev[BANK1_CTX],
|
|
@@ -216,8 +216,8 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
|
|
|
else
|
|
|
ctx->ctx.size = buf_size->non_h264_ctx;
|
|
|
|
|
|
- ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX], dev->bank1,
|
|
|
- &ctx->ctx);
|
|
|
+ ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX],
|
|
|
+ dev->dma_base[BANK1_CTX], &ctx->ctx);
|
|
|
if (ret) {
|
|
|
mfc_err("Failed to allocate instance buffer\n");
|
|
|
return ret;
|
|
@@ -230,8 +230,8 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
|
|
|
|
|
|
/* Initialize shared memory */
|
|
|
ctx->shm.size = buf_size->shm;
|
|
|
- ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX], dev->bank1,
|
|
|
- &ctx->shm);
|
|
|
+ ret = s5p_mfc_alloc_priv_buf(dev->mem_dev[BANK1_CTX],
|
|
|
+ dev->dma_base[BANK1_CTX], &ctx->shm);
|
|
|
if (ret) {
|
|
|
mfc_err("Failed to allocate shared memory buffer\n");
|
|
|
s5p_mfc_release_priv_buf(dev->mem_dev[BANK1_CTX], &ctx->ctx);
|
|
@@ -239,7 +239,7 @@ static int s5p_mfc_alloc_instance_buffer_v5(struct s5p_mfc_ctx *ctx)
|
|
|
}
|
|
|
|
|
|
/* shared memory offset only keeps the offset from base (port a) */
|
|
|
- ctx->shm.ofs = ctx->shm.dma - dev->bank1;
|
|
|
+ ctx->shm.ofs = ctx->shm.dma - dev->dma_base[BANK1_CTX];
|
|
|
BUG_ON(ctx->shm.ofs & ((1 << MFC_BANK1_ALIGN_ORDER) - 1));
|
|
|
|
|
|
memset(ctx->shm.virt, 0, buf_size->shm);
|
|
@@ -538,10 +538,10 @@ static void s5p_mfc_get_enc_frame_buffer_v5(struct s5p_mfc_ctx *ctx,
|
|
|
{
|
|
|
struct s5p_mfc_dev *dev = ctx->dev;
|
|
|
|
|
|
- *y_addr = dev->bank2 + (mfc_read(dev, S5P_FIMV_ENCODED_Y_ADDR)
|
|
|
- << MFC_OFFSET_SHIFT);
|
|
|
- *c_addr = dev->bank2 + (mfc_read(dev, S5P_FIMV_ENCODED_C_ADDR)
|
|
|
- << MFC_OFFSET_SHIFT);
|
|
|
+ *y_addr = dev->dma_base[BANK2_CTX] +
|
|
|
+ (mfc_read(dev, S5P_FIMV_ENCODED_Y_ADDR) << MFC_OFFSET_SHIFT);
|
|
|
+ *c_addr = dev->dma_base[BANK2_CTX] +
|
|
|
+ (mfc_read(dev, S5P_FIMV_ENCODED_C_ADDR) << MFC_OFFSET_SHIFT);
|
|
|
}
|
|
|
|
|
|
/* Set encoding ref & codec buffer */
|
|
@@ -1218,7 +1218,8 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|
|
}
|
|
|
if (list_empty(&ctx->src_queue)) {
|
|
|
/* send null frame */
|
|
|
- s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->bank2, dev->bank2);
|
|
|
+ s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->dma_base[BANK2_CTX],
|
|
|
+ dev->dma_base[BANK2_CTX]);
|
|
|
src_mb = NULL;
|
|
|
} else {
|
|
|
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf,
|
|
@@ -1226,8 +1227,9 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|
|
src_mb->flags |= MFC_BUF_FLAG_USED;
|
|
|
if (src_mb->b->vb2_buf.planes[0].bytesused == 0) {
|
|
|
/* send null frame */
|
|
|
- s5p_mfc_set_enc_frame_buffer_v5(ctx, dev->bank2,
|
|
|
- dev->bank2);
|
|
|
+ s5p_mfc_set_enc_frame_buffer_v5(ctx,
|
|
|
+ dev->dma_base[BANK2_CTX],
|
|
|
+ dev->dma_base[BANK2_CTX]);
|
|
|
ctx->state = MFCINST_FINISHING;
|
|
|
} else {
|
|
|
src_y_addr = vb2_dma_contig_plane_dma_addr(
|