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@@ -236,7 +236,6 @@ struct lpuart_port {
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struct clk *clk;
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unsigned int txfifo_size;
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unsigned int rxfifo_size;
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- bool lpuart32;
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bool lpuart_dma_tx_use;
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bool lpuart_dma_rx_use;
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@@ -258,13 +257,21 @@ struct lpuart_port {
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wait_queue_head_t dma_wait;
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};
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+struct lpuart_soc_data {
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+ char iotype;
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+};
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+
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+static const struct lpuart_soc_data vf_data = {
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+ .iotype = UPIO_MEM,
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+};
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+
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+static const struct lpuart_soc_data ls_data = {
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+ .iotype = UPIO_MEM32BE,
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+};
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+
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static const struct of_device_id lpuart_dt_ids[] = {
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- {
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- .compatible = "fsl,vf610-lpuart",
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- },
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- {
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- .compatible = "fsl,ls1021a-lpuart",
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- },
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+ { .compatible = "fsl,vf610-lpuart", .data = &vf_data, },
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+ { .compatible = "fsl,ls1021a-lpuart", .data = &ls_data, },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, lpuart_dt_ids);
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@@ -593,7 +600,7 @@ static irqreturn_t lpuart_txint(int irq, void *dev_id)
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spin_lock_irqsave(&sport->port.lock, flags);
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if (sport->port.x_char) {
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart32_write(sport->port.x_char, sport->port.membase + UARTDATA);
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else
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writeb(sport->port.x_char, sport->port.membase + UARTDR);
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@@ -601,14 +608,14 @@ static irqreturn_t lpuart_txint(int irq, void *dev_id)
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart32_stop_tx(&sport->port);
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else
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lpuart_stop_tx(&sport->port);
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goto out;
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}
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart32_transmit_buffer(sport);
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else
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lpuart_transmit_buffer(sport);
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@@ -1881,12 +1888,12 @@ static int __init lpuart_console_setup(struct console *co, char *options)
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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else
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart32_console_get_options(sport, &baud, &parity, &bits);
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else
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lpuart_console_get_options(sport, &baud, &parity, &bits);
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart32_setup_watermark(sport);
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else
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lpuart_setup_watermark(sport);
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@@ -1971,6 +1978,9 @@ static struct uart_driver lpuart_reg = {
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static int lpuart_probe(struct platform_device *pdev)
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{
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+ const struct of_device_id *of_id = of_match_device(lpuart_dt_ids,
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+ &pdev->dev);
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+ const struct lpuart_soc_data *sdata = of_id->data;
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struct device_node *np = pdev->dev.of_node;
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struct lpuart_port *sport;
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struct resource *res;
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@@ -1988,8 +1998,6 @@ static int lpuart_probe(struct platform_device *pdev)
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return ret;
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}
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sport->port.line = ret;
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- sport->lpuart32 = of_device_is_compatible(np, "fsl,ls1021a-lpuart");
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-
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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sport->port.membase = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(sport->port.membase))
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@@ -1998,15 +2006,14 @@ static int lpuart_probe(struct platform_device *pdev)
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sport->port.mapbase = res->start;
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sport->port.dev = &pdev->dev;
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sport->port.type = PORT_LPUART;
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- sport->port.iotype = UPIO_MEM;
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ret = platform_get_irq(pdev, 0);
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if (ret < 0) {
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dev_err(&pdev->dev, "cannot obtain irq\n");
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return ret;
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}
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sport->port.irq = ret;
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-
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- if (sport->lpuart32)
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+ sport->port.iotype = sdata->iotype;
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+ if (sport->port.iotype & UPIO_MEM32BE)
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sport->port.ops = &lpuart32_pops;
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else
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sport->port.ops = &lpuart_pops;
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@@ -2033,7 +2040,7 @@ static int lpuart_probe(struct platform_device *pdev)
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platform_set_drvdata(pdev, &sport->port);
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- if (sport->lpuart32)
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+ if (sport->port.iotype & UPIO_MEM32BE)
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lpuart_reg.cons = LPUART32_CONSOLE;
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else
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lpuart_reg.cons = LPUART_CONSOLE;
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@@ -2086,7 +2093,7 @@ static int lpuart_suspend(struct device *dev)
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struct lpuart_port *sport = dev_get_drvdata(dev);
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unsigned long temp;
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- if (sport->lpuart32) {
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+ if (sport->port.iotype & UPIO_MEM32BE) {
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/* disable Rx/Tx and interrupts */
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temp = lpuart32_read(sport->port.membase + UARTCTRL);
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temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE);
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@@ -2137,7 +2144,7 @@ static int lpuart_resume(struct device *dev)
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if (sport->port.suspended && !sport->port.irq_wake)
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clk_prepare_enable(sport->clk);
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- if (sport->lpuart32) {
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+ if (sport->port.iotype & UPIO_MEM32BE) {
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lpuart32_setup_watermark(sport);
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temp = lpuart32_read(sport->port.membase + UARTCTRL);
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temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE |
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