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@@ -3486,15 +3486,23 @@ static void gen8_enable_rps(struct drm_device *dev)
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for_each_ring(ring, dev_priv, unused)
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I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
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I915_WRITE(GEN6_RC_SLEEP, 0);
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- I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
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+ if (IS_BROADWELL(dev))
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+ I915_WRITE(GEN6_RC6_THRESHOLD, 625); /* 800us/1.28 for TO */
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+ else
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+ I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */
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/* 3: Enable RC6 */
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if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
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rc6_mask = GEN6_RC_CTL_RC6_ENABLE;
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intel_print_rc6_info(dev, rc6_mask);
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- I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
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- GEN6_RC_CTL_EI_MODE(1) |
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- rc6_mask);
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+ if (IS_BROADWELL(dev))
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+ I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
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+ GEN7_RC_CTL_TO_MODE |
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+ rc6_mask);
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+ else
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+ I915_WRITE(GEN6_RC_CONTROL, GEN6_RC_CTL_HW_ENABLE |
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+ GEN6_RC_CTL_EI_MODE(1) |
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+ rc6_mask);
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/* 4 Program defaults and thresholds for RPS*/
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I915_WRITE(GEN6_RPNSWREQ,
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