|
@@ -1756,28 +1756,29 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
|
|
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
|
|
u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
|
|
|
|
|
|
- if (hotplug_status) {
|
|
|
- I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
|
|
|
- /*
|
|
|
- * Make sure hotplug status is cleared before we clear IIR, or else we
|
|
|
- * may miss hotplug events.
|
|
|
- */
|
|
|
- POSTING_READ(PORT_HOTPLUG_STAT);
|
|
|
+ if (!hotplug_status)
|
|
|
+ return;
|
|
|
|
|
|
- if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
|
|
|
- u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
|
|
|
+ I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
|
|
|
+ /*
|
|
|
+ * Make sure hotplug status is cleared before we clear IIR, or else we
|
|
|
+ * may miss hotplug events.
|
|
|
+ */
|
|
|
+ POSTING_READ(PORT_HOTPLUG_STAT);
|
|
|
|
|
|
- intel_hpd_irq_handler(dev, hotplug_trigger, 0, hpd_status_g4x);
|
|
|
- } else {
|
|
|
- u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
|
|
|
+ if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
|
|
|
+ u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
|
|
|
|
|
|
- intel_hpd_irq_handler(dev, hotplug_trigger, 0, hpd_status_i915);
|
|
|
- }
|
|
|
+ intel_hpd_irq_handler(dev, hotplug_trigger, 0, hpd_status_g4x);
|
|
|
+ } else {
|
|
|
+ u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
|
|
|
|
|
|
- if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) &&
|
|
|
- hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
|
|
|
- dp_aux_irq_handler(dev);
|
|
|
+ intel_hpd_irq_handler(dev, hotplug_trigger, 0, hpd_status_i915);
|
|
|
}
|
|
|
+
|
|
|
+ if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) &&
|
|
|
+ hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
|
|
|
+ dp_aux_irq_handler(dev);
|
|
|
}
|
|
|
|
|
|
static irqreturn_t valleyview_irq_handler(int irq, void *arg)
|