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@@ -6085,24 +6085,17 @@ static int nand_set_ecc_soft_ops(struct mtd_info *mtd)
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* by the controller and the calculated ECC bytes fit within the chip's OOB.
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* On success, the calculated ECC bytes is set.
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*/
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-int nand_check_ecc_caps(struct nand_chip *chip,
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- const struct nand_ecc_caps *caps, int oobavail)
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+static int
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+nand_check_ecc_caps(struct nand_chip *chip,
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+ const struct nand_ecc_caps *caps, int oobavail)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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const struct nand_ecc_step_info *stepinfo;
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int preset_step = chip->ecc.size;
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int preset_strength = chip->ecc.strength;
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- int nsteps, ecc_bytes;
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+ int ecc_bytes, nsteps = mtd->writesize / preset_step;
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int i, j;
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- if (WARN_ON(oobavail < 0))
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- return -EINVAL;
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-
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- if (!preset_step || !preset_strength)
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- return -ENODATA;
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-
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- nsteps = mtd->writesize / preset_step;
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-
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for (i = 0; i < caps->nstepinfos; i++) {
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stepinfo = &caps->stepinfos[i];
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@@ -6135,7 +6128,6 @@ int nand_check_ecc_caps(struct nand_chip *chip,
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return -ENOTSUPP;
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}
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-EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
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/**
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* nand_match_ecc_req - meet the chip's requirement with least ECC bytes
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@@ -6147,8 +6139,9 @@ EXPORT_SYMBOL_GPL(nand_check_ecc_caps);
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* number of ECC bytes (i.e. with the largest number of OOB-free bytes).
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* On success, the chosen ECC settings are set.
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*/
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-int nand_match_ecc_req(struct nand_chip *chip,
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- const struct nand_ecc_caps *caps, int oobavail)
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+static int
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+nand_match_ecc_req(struct nand_chip *chip,
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+ const struct nand_ecc_caps *caps, int oobavail)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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const struct nand_ecc_step_info *stepinfo;
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@@ -6159,9 +6152,6 @@ int nand_match_ecc_req(struct nand_chip *chip,
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int best_ecc_bytes_total = INT_MAX;
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int i, j;
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- if (WARN_ON(oobavail < 0))
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- return -EINVAL;
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-
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/* No information provided by the NAND chip */
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if (!req_step || !req_strength)
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return -ENOTSUPP;
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@@ -6220,7 +6210,6 @@ int nand_match_ecc_req(struct nand_chip *chip,
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return 0;
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}
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-EXPORT_SYMBOL_GPL(nand_match_ecc_req);
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/**
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* nand_maximize_ecc - choose the max ECC strength available
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@@ -6231,8 +6220,9 @@ EXPORT_SYMBOL_GPL(nand_match_ecc_req);
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* Choose the max ECC strength that is supported on the controller, and can fit
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* within the chip's OOB. On success, the chosen ECC settings are set.
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*/
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-int nand_maximize_ecc(struct nand_chip *chip,
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- const struct nand_ecc_caps *caps, int oobavail)
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+static int
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+nand_maximize_ecc(struct nand_chip *chip,
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+ const struct nand_ecc_caps *caps, int oobavail)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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const struct nand_ecc_step_info *stepinfo;
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@@ -6242,9 +6232,6 @@ int nand_maximize_ecc(struct nand_chip *chip,
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int best_strength, best_ecc_bytes;
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int i, j;
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- if (WARN_ON(oobavail < 0))
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- return -EINVAL;
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-
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for (i = 0; i < caps->nstepinfos; i++) {
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stepinfo = &caps->stepinfos[i];
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step_size = stepinfo->stepsize;
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@@ -6293,7 +6280,6 @@ int nand_maximize_ecc(struct nand_chip *chip,
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return 0;
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}
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-EXPORT_SYMBOL_GPL(nand_maximize_ecc);
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/**
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* nand_ecc_choose_conf - Set the ECC strength and ECC step size
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@@ -6315,6 +6301,11 @@ EXPORT_SYMBOL_GPL(nand_maximize_ecc);
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int nand_ecc_choose_conf(struct nand_chip *chip,
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const struct nand_ecc_caps *caps, int oobavail)
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{
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+ struct mtd_info *mtd = nand_to_mtd(chip);
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+
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+ if (WARN_ON(oobavail < 0 || oobavail > mtd->oobsize))
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+ return -EINVAL;
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+
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if (chip->ecc.size && chip->ecc.strength)
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return nand_check_ecc_caps(chip, caps, oobavail);
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