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@@ -47,12 +47,14 @@
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#define SATA_ECC_DISABLE 0x00020000
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#define ECC_DIS_ARMV8_CH2 0x80000000
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+#define ECC_DIS_LS1088A 0x40000000
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enum ahci_qoriq_type {
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AHCI_LS1021A,
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AHCI_LS1043A,
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AHCI_LS2080A,
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AHCI_LS1046A,
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+ AHCI_LS1088A,
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AHCI_LS2088A,
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};
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@@ -68,6 +70,7 @@ static const struct of_device_id ahci_qoriq_of_match[] = {
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{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},
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{ .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},
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{ .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},
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+ { .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},
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{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},
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{},
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};
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@@ -203,6 +206,17 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
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break;
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+ case AHCI_LS1088A:
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+ if (!qpriv->ecc_addr)
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+ return -EINVAL;
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+ writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A,
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+ qpriv->ecc_addr);
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+ writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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+ writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
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+ if (qpriv->is_dmacoherent)
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+ writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);
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+ break;
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+
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case AHCI_LS2088A:
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
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