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@@ -644,7 +644,7 @@ pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num
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switch (pcie_link_status) {
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case 7:
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val = read_config(pcie, 2, 0x4);
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- write_config(pcie, 2, 0x4, val|0x4);
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+ write_config(pcie, 2, 0x4, val | 0x4);
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val = read_config(pcie, 2, 0x70c);
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val &= ~(0xff)<<8;
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val |= 0x50<<8;
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@@ -653,14 +653,14 @@ pcie(2/1/0) link status pcie2_num pcie1_num pcie0_num
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case 5:
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case 6:
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val = read_config(pcie, 1, 0x4);
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- write_config(pcie, 1, 0x4, val|0x4);
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+ write_config(pcie, 1, 0x4, val | 0x4);
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val = read_config(pcie, 1, 0x70c);
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val &= ~(0xff)<<8;
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val |= 0x50<<8;
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write_config(pcie, 1, 0x70c, val);
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default:
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val = read_config(pcie, 0, 0x4);
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- write_config(pcie, 0, 0x4, val|0x4); //bus master enable
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+ write_config(pcie, 0, 0x4, val | 0x4); //bus master enable
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val = read_config(pcie, 0, 0x70c);
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val &= ~(0xff)<<8;
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val |= 0x50<<8;
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