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@@ -253,7 +253,7 @@ void radeon_dp_aux_init(struct radeon_connector *radeon_connector)
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#define DP_VOLTAGE_MAX DP_TRAIN_VOLTAGE_SWING_LEVEL_3
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#define DP_PRE_EMPHASIS_MAX DP_TRAIN_PRE_EMPH_LEVEL_3
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-static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE],
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+static void dp_get_adjust_train(const u8 link_status[DP_LINK_STATUS_SIZE],
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int lane_count,
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u8 train_set[4])
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{
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@@ -311,7 +311,7 @@ static int dp_get_max_dp_pix_clock(int link_rate,
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/***** radeon specific DP functions *****/
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int radeon_dp_get_max_link_rate(struct drm_connector *connector,
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- u8 dpcd[DP_DPCD_SIZE])
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+ const u8 dpcd[DP_DPCD_SIZE])
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{
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int max_link_rate;
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@@ -328,7 +328,7 @@ int radeon_dp_get_max_link_rate(struct drm_connector *connector,
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* if the max lane# < low rate lane# then use max lane# instead.
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*/
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static int radeon_dp_get_dp_lane_number(struct drm_connector *connector,
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- u8 dpcd[DP_DPCD_SIZE],
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+ const u8 dpcd[DP_DPCD_SIZE],
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int pix_clock)
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{
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int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));
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@@ -347,7 +347,7 @@ static int radeon_dp_get_dp_lane_number(struct drm_connector *connector,
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}
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static int radeon_dp_get_dp_link_clock(struct drm_connector *connector,
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- u8 dpcd[DP_DPCD_SIZE],
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+ const u8 dpcd[DP_DPCD_SIZE],
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int pix_clock)
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{
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int bpp = convert_bpc_to_bpp(radeon_get_monitor_bpc(connector));
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