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@@ -37,8 +37,6 @@
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#define ARB_ERR_CAP_CLEAR (1 << 0)
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#define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12)
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#define ARB_ERR_CAP_STATUS_TEA (1 << 11)
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-#define ARB_ERR_CAP_STATUS_BS_SHIFT (1 << 2)
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-#define ARB_ERR_CAP_STATUS_BS_MASK 0x3c
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#define ARB_ERR_CAP_STATUS_WRITE (1 << 1)
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#define ARB_ERR_CAP_STATUS_VALID (1 << 0)
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@@ -47,7 +45,6 @@ enum {
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ARB_ERR_CAP_CLR,
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ARB_ERR_CAP_HI_ADDR,
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ARB_ERR_CAP_ADDR,
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- ARB_ERR_CAP_DATA,
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ARB_ERR_CAP_STATUS,
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ARB_ERR_CAP_MASTER,
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};
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@@ -57,7 +54,6 @@ static const int gisb_offsets_bcm7038[] = {
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[ARB_ERR_CAP_CLR] = 0x0c4,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x0c8,
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- [ARB_ERR_CAP_DATA] = 0x0cc,
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[ARB_ERR_CAP_STATUS] = 0x0d0,
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[ARB_ERR_CAP_MASTER] = -1,
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};
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@@ -67,7 +63,6 @@ static const int gisb_offsets_bcm7400[] = {
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[ARB_ERR_CAP_CLR] = 0x0c8,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x0cc,
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- [ARB_ERR_CAP_DATA] = 0x0d0,
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[ARB_ERR_CAP_STATUS] = 0x0d4,
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[ARB_ERR_CAP_MASTER] = 0x0d8,
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};
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@@ -77,7 +72,6 @@ static const int gisb_offsets_bcm7435[] = {
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[ARB_ERR_CAP_CLR] = 0x168,
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[ARB_ERR_CAP_HI_ADDR] = -1,
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[ARB_ERR_CAP_ADDR] = 0x16c,
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- [ARB_ERR_CAP_DATA] = 0x170,
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[ARB_ERR_CAP_STATUS] = 0x174,
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[ARB_ERR_CAP_MASTER] = 0x178,
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};
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@@ -87,7 +81,6 @@ static const int gisb_offsets_bcm7445[] = {
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[ARB_ERR_CAP_CLR] = 0x7e4,
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[ARB_ERR_CAP_HI_ADDR] = 0x7e8,
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[ARB_ERR_CAP_ADDR] = 0x7ec,
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- [ARB_ERR_CAP_DATA] = 0x7f0,
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[ARB_ERR_CAP_STATUS] = 0x7f4,
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[ARB_ERR_CAP_MASTER] = 0x7f8,
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};
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@@ -109,9 +102,13 @@ static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg)
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{
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int offset = gdev->gisb_offsets[reg];
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- /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */
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- if (offset == -1)
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- return 1;
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+ if (offset < 0) {
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+ /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */
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+ if (reg == ARB_ERR_CAP_MASTER)
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+ return 1;
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+ else
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+ return 0;
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+ }
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if (gdev->big_endian)
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return ioread32be(gdev->base + offset);
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@@ -119,6 +116,16 @@ static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg)
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return ioread32(gdev->base + offset);
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}
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+static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev)
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+{
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+ u64 value;
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+
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+ value = gisb_read(gdev, ARB_ERR_CAP_ADDR);
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+ value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32;
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+
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+ return value;
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+}
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+
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static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg)
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{
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int offset = gdev->gisb_offsets[reg];
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@@ -185,7 +192,7 @@ static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
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const char *reason)
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{
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u32 cap_status;
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- unsigned long arb_addr;
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+ u64 arb_addr;
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u32 master;
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const char *m_name;
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char m_fmt[11];
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@@ -197,10 +204,7 @@ static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
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return 1;
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/* Read the address and master */
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- arb_addr = gisb_read(gdev, ARB_ERR_CAP_ADDR) & 0xffffffff;
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-#if (IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT))
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- arb_addr |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32;
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-#endif
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+ arb_addr = gisb_read_address(gdev);
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master = gisb_read(gdev, ARB_ERR_CAP_MASTER);
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m_name = brcmstb_gisb_master_to_str(gdev, master);
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@@ -209,7 +213,7 @@ static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
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m_name = m_fmt;
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}
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- pr_crit("%s: %s at 0x%lx [%c %s], core: %s\n",
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+ pr_crit("%s: %s at 0x%llx [%c %s], core: %s\n",
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__func__, reason, arb_addr,
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cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R',
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cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "",
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