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+/*
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+ * Defines, structures, APIs for edac_pci and edac_pci_sysfs
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+ *
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+ * (C) 2007 Linux Networx (http://lnxi.com)
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+ * This file may be distributed under the terms of the
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+ * GNU General Public License.
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+ *
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+ * Written by Thayne Harbaugh
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+ * Based on work by Dan Hollis <goemon at anime dot net> and others.
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+ * http://www.anime.net/~goemon/linux-ecc/
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+ *
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+ * NMI handling support added by
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+ * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
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+ *
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+ * Refactored for multi-source files:
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+ * Doug Thompson <norsk5@xmission.com>
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+ *
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+ * Please look at Documentation/driver-api/edac.rst for more info about
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+ * EDAC core structs and functions.
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+ */
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+
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+#ifndef _EDAC_PCI_H_
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+#define _EDAC_PCI_H_
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+
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+#include <linux/completion.h>
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+#include <linux/device.h>
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+#include <linux/edac.h>
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+#include <linux/kobject.h>
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+#include <linux/list.h>
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+#include <linux/pci.h>
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+#include <linux/types.h>
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+#include <linux/workqueue.h>
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+
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+#ifdef CONFIG_PCI
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+
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+struct edac_pci_counter {
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+ atomic_t pe_count;
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+ atomic_t npe_count;
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+};
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+
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+/*
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+ * Abstract edac_pci control info structure
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+ *
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+ */
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+struct edac_pci_ctl_info {
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+ /* for global list of edac_pci_ctl_info structs */
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+ struct list_head link;
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+
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+ int pci_idx;
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+
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+ struct bus_type *edac_subsys; /* pointer to subsystem */
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+
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+ /* the internal state of this controller instance */
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+ int op_state;
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+ /* work struct for this instance */
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+ struct delayed_work work;
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+
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+ /* pointer to edac polling checking routine:
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+ * If NOT NULL: points to polling check routine
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+ * If NULL: Then assumes INTERRUPT operation, where
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+ * MC driver will receive events
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+ */
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+ void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
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+
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+ struct device *dev; /* pointer to device structure */
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+
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+ const char *mod_name; /* module name */
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+ const char *ctl_name; /* edac controller name */
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+ const char *dev_name; /* pci/platform/etc... name */
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+
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+ void *pvt_info; /* pointer to 'private driver' info */
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+
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+ unsigned long start_time; /* edac_pci load start time (jiffies) */
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+
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+ struct completion complete;
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+
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+ /* sysfs top name under 'edac' directory
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+ * and instance name:
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+ * cpu/cpu0/...
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+ * cpu/cpu1/...
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+ * cpu/cpu2/...
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+ * ...
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+ */
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+ char name[EDAC_DEVICE_NAME_LEN + 1];
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+
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+ /* Event counters for the this whole EDAC Device */
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+ struct edac_pci_counter counters;
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+
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+ /* edac sysfs device control for the 'name'
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+ * device this structure controls
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+ */
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+ struct kobject kobj;
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+};
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+
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+#define to_edac_pci_ctl_work(w) \
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+ container_of(w, struct edac_pci_ctl_info,work)
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+
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+/* write all or some bits in a byte-register*/
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+static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
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+ u8 mask)
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+{
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+ if (mask != 0xff) {
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+ u8 buf;
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+
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+ pci_read_config_byte(pdev, offset, &buf);
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+ value &= mask;
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+ buf &= ~mask;
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+ value |= buf;
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+ }
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+
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+ pci_write_config_byte(pdev, offset, value);
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+}
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+
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+/* write all or some bits in a word-register*/
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+static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
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+ u16 value, u16 mask)
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+{
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+ if (mask != 0xffff) {
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+ u16 buf;
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+
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+ pci_read_config_word(pdev, offset, &buf);
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+ value &= mask;
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+ buf &= ~mask;
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+ value |= buf;
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+ }
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+
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+ pci_write_config_word(pdev, offset, value);
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+}
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+
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+/*
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+ * pci_write_bits32
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+ *
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+ * edac local routine to do pci_write_config_dword, but adds
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+ * a mask parameter. If mask is all ones, ignore the mask.
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+ * Otherwise utilize the mask to isolate specified bits
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+ *
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+ * write all or some bits in a dword-register
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+ */
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+static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
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+ u32 value, u32 mask)
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+{
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+ if (mask != 0xffffffff) {
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+ u32 buf;
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+
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+ pci_read_config_dword(pdev, offset, &buf);
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+ value &= mask;
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+ buf &= ~mask;
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+ value |= buf;
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+ }
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+
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+ pci_write_config_dword(pdev, offset, value);
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+}
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+
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+#endif /* CONFIG_PCI */
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+
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+extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
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+ const char *edac_pci_name);
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+
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+extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
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+
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+extern int edac_pci_alloc_index(void);
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+extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
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+extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
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+
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+extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
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+ struct device *dev,
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+ const char *mod_name);
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+
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+extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
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+extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
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+extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
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+
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+#endif
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Mauro Carvalho Chehab