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@@ -56,6 +56,16 @@ enum engine_status_constants {
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UVD_STATUS__RBC_BUSY = 0x1,
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};
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+enum internal_dpg_state {
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+ VCN_DPG_STATE__UNPAUSE = 0,
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+ VCN_DPG_STATE__PAUSE,
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+};
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+
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+struct dpg_pause_state {
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+ enum internal_dpg_state fw_based;
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+ enum internal_dpg_state jpeg;
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+};
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+
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struct amdgpu_vcn {
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struct amdgpu_bo *vcpu_bo;
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void *cpu_addr;
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@@ -70,6 +80,7 @@ struct amdgpu_vcn {
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struct amdgpu_irq_src irq;
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unsigned num_enc_rings;
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enum amd_powergating_state cur_state;
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+ struct dpg_pause_state pause_state;
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};
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int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
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