|
@@ -34,9 +34,9 @@ static void i40e_adminq_init_regs(struct i40e_hw *hw)
|
|
|
* i40e_alloc_adminq_asq_ring - Allocate Admin Queue send rings
|
|
|
* @hw: pointer to the hardware structure
|
|
|
**/
|
|
|
-static i40e_status i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code;
|
|
|
+ iavf_status ret_code;
|
|
|
|
|
|
ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf,
|
|
|
i40e_mem_atq_ring,
|
|
@@ -61,9 +61,9 @@ static i40e_status i40e_alloc_adminq_asq_ring(struct i40e_hw *hw)
|
|
|
* i40e_alloc_adminq_arq_ring - Allocate Admin Queue receive rings
|
|
|
* @hw: pointer to the hardware structure
|
|
|
**/
|
|
|
-static i40e_status i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_alloc_adminq_arq_ring(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code;
|
|
|
+ iavf_status ret_code;
|
|
|
|
|
|
ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf,
|
|
|
i40e_mem_arq_ring,
|
|
@@ -102,11 +102,11 @@ static void i40e_free_adminq_arq(struct i40e_hw *hw)
|
|
|
* i40e_alloc_arq_bufs - Allocate pre-posted buffers for the receive queue
|
|
|
* @hw: pointer to the hardware structure
|
|
|
**/
|
|
|
-static i40e_status i40e_alloc_arq_bufs(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_alloc_arq_bufs(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code;
|
|
|
struct i40e_aq_desc *desc;
|
|
|
struct i40e_dma_mem *bi;
|
|
|
+ iavf_status ret_code;
|
|
|
int i;
|
|
|
|
|
|
/* We'll be allocating the buffer info memory first, then we can
|
|
@@ -115,7 +115,8 @@ static i40e_status i40e_alloc_arq_bufs(struct i40e_hw *hw)
|
|
|
|
|
|
/* buffer_info structures do not need alignment */
|
|
|
ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head,
|
|
|
- (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem)));
|
|
|
+ (hw->aq.num_arq_entries *
|
|
|
+ sizeof(struct i40e_dma_mem)));
|
|
|
if (ret_code)
|
|
|
goto alloc_arq_bufs;
|
|
|
hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va;
|
|
@@ -169,15 +170,16 @@ unwind_alloc_arq_bufs:
|
|
|
* i40e_alloc_asq_bufs - Allocate empty buffer structs for the send queue
|
|
|
* @hw: pointer to the hardware structure
|
|
|
**/
|
|
|
-static i40e_status i40e_alloc_asq_bufs(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_alloc_asq_bufs(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code;
|
|
|
struct i40e_dma_mem *bi;
|
|
|
+ iavf_status ret_code;
|
|
|
int i;
|
|
|
|
|
|
/* No mapped memory needed yet, just the buffer info structures */
|
|
|
ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head,
|
|
|
- (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem)));
|
|
|
+ (hw->aq.num_asq_entries *
|
|
|
+ sizeof(struct i40e_dma_mem)));
|
|
|
if (ret_code)
|
|
|
goto alloc_asq_bufs;
|
|
|
hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va;
|
|
@@ -253,9 +255,9 @@ static void i40e_free_asq_bufs(struct i40e_hw *hw)
|
|
|
*
|
|
|
* Configure base address and length registers for the transmit queue
|
|
|
**/
|
|
|
-static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_config_asq_regs(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
u32 reg = 0;
|
|
|
|
|
|
/* Clear Head and Tail */
|
|
@@ -282,9 +284,9 @@ static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
|
|
|
*
|
|
|
* Configure base address and length registers for the receive (event queue)
|
|
|
**/
|
|
|
-static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_config_arq_regs(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
u32 reg = 0;
|
|
|
|
|
|
/* Clear Head and Tail */
|
|
@@ -321,9 +323,9 @@ static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
|
|
|
* Do *NOT* hold the lock when calling this as the memory allocation routines
|
|
|
* called are not going to be atomic context safe
|
|
|
**/
|
|
|
-static i40e_status i40e_init_asq(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_init_asq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
|
|
|
if (hw->aq.asq.count > 0) {
|
|
|
/* queue already initialized */
|
|
@@ -380,9 +382,9 @@ init_adminq_exit:
|
|
|
* Do *NOT* hold the lock when calling this as the memory allocation routines
|
|
|
* called are not going to be atomic context safe
|
|
|
**/
|
|
|
-static i40e_status i40e_init_arq(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_init_arq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
|
|
|
if (hw->aq.arq.count > 0) {
|
|
|
/* queue already initialized */
|
|
@@ -432,9 +434,9 @@ init_adminq_exit:
|
|
|
*
|
|
|
* The main shutdown routine for the Admin Send Queue
|
|
|
**/
|
|
|
-static i40e_status i40e_shutdown_asq(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_shutdown_asq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
|
|
|
mutex_lock(&hw->aq.asq_mutex);
|
|
|
|
|
@@ -466,9 +468,9 @@ shutdown_asq_out:
|
|
|
*
|
|
|
* The main shutdown routine for the Admin Receive Queue
|
|
|
**/
|
|
|
-static i40e_status i40e_shutdown_arq(struct i40e_hw *hw)
|
|
|
+static iavf_status i40e_shutdown_arq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
|
|
|
mutex_lock(&hw->aq.arq_mutex);
|
|
|
|
|
@@ -505,9 +507,9 @@ shutdown_arq_out:
|
|
|
* - hw->aq.arq_buf_size
|
|
|
* - hw->aq.asq_buf_size
|
|
|
**/
|
|
|
-i40e_status iavf_init_adminq(struct i40e_hw *hw)
|
|
|
+iavf_status iavf_init_adminq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code;
|
|
|
+ iavf_status ret_code;
|
|
|
|
|
|
/* verify input for valid configuration */
|
|
|
if ((hw->aq.num_arq_entries == 0) ||
|
|
@@ -549,9 +551,9 @@ init_adminq_exit:
|
|
|
* iavf_shutdown_adminq - shutdown routine for the Admin Queue
|
|
|
* @hw: pointer to the hardware structure
|
|
|
**/
|
|
|
-i40e_status iavf_shutdown_adminq(struct i40e_hw *hw)
|
|
|
+iavf_status iavf_shutdown_adminq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
|
|
|
if (iavf_check_asq_alive(hw))
|
|
|
iavf_aq_queue_shutdown(hw, true);
|
|
@@ -570,7 +572,7 @@ i40e_status iavf_shutdown_adminq(struct i40e_hw *hw)
|
|
|
**/
|
|
|
static u16 i40e_clean_asq(struct i40e_hw *hw)
|
|
|
{
|
|
|
- struct i40e_adminq_ring *asq = &(hw->aq.asq);
|
|
|
+ struct i40e_adminq_ring *asq = &hw->aq.asq;
|
|
|
struct i40e_asq_cmd_details *details;
|
|
|
u16 ntc = asq->next_to_clean;
|
|
|
struct i40e_aq_desc desc_cb;
|
|
@@ -616,7 +618,6 @@ bool iavf_asq_done(struct i40e_hw *hw)
|
|
|
* timing reliability than DD bit
|
|
|
*/
|
|
|
return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;
|
|
|
-
|
|
|
}
|
|
|
|
|
|
/**
|
|
@@ -630,13 +631,13 @@ bool iavf_asq_done(struct i40e_hw *hw)
|
|
|
* This is the main send command driver routine for the Admin Queue send
|
|
|
* queue. It runs the queue, cleans the queue, etc
|
|
|
**/
|
|
|
-i40e_status iavf_asq_send_command(struct i40e_hw *hw,
|
|
|
+iavf_status iavf_asq_send_command(struct i40e_hw *hw,
|
|
|
struct i40e_aq_desc *desc,
|
|
|
void *buff, /* can be NULL */
|
|
|
u16 buff_size,
|
|
|
struct i40e_asq_cmd_details *cmd_details)
|
|
|
{
|
|
|
- i40e_status status = 0;
|
|
|
+ iavf_status status = 0;
|
|
|
struct i40e_dma_mem *dma_buff = NULL;
|
|
|
struct i40e_asq_cmd_details *details;
|
|
|
struct i40e_aq_desc *desc_on_ring;
|
|
@@ -724,8 +725,8 @@ i40e_status iavf_asq_send_command(struct i40e_hw *hw,
|
|
|
*desc_on_ring = *desc;
|
|
|
|
|
|
/* if buff is not NULL assume indirect command */
|
|
|
- if (buff != NULL) {
|
|
|
- dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]);
|
|
|
+ if (buff) {
|
|
|
+ dma_buff = &hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use];
|
|
|
/* copy the user buff into the respective DMA buff */
|
|
|
memcpy(dma_buff->va, buff, buff_size);
|
|
|
desc_on_ring->datalen = cpu_to_le16(buff_size);
|
|
@@ -769,7 +770,7 @@ i40e_status iavf_asq_send_command(struct i40e_hw *hw,
|
|
|
/* if ready, copy the desc back to temp */
|
|
|
if (iavf_asq_done(hw)) {
|
|
|
*desc = *desc_on_ring;
|
|
|
- if (buff != NULL)
|
|
|
+ if (buff)
|
|
|
memcpy(buff, dma_buff->va, buff_size);
|
|
|
retval = le16_to_cpu(desc->retval);
|
|
|
if (retval != 0) {
|
|
@@ -793,8 +794,7 @@ i40e_status iavf_asq_send_command(struct i40e_hw *hw,
|
|
|
|
|
|
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
|
|
|
"AQTX: desc and buffer writeback:\n");
|
|
|
- iavf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff,
|
|
|
- buff_size);
|
|
|
+ iavf_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size);
|
|
|
|
|
|
/* save writeback aq if requested */
|
|
|
if (details->wb_desc)
|
|
@@ -826,8 +826,7 @@ asq_send_command_error:
|
|
|
*
|
|
|
* Fill the desc with default values
|
|
|
**/
|
|
|
-void iavf_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,
|
|
|
- u16 opcode)
|
|
|
+void iavf_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, u16 opcode)
|
|
|
{
|
|
|
/* zero out the desc */
|
|
|
memset((void *)desc, 0, sizeof(struct i40e_aq_desc));
|
|
@@ -845,13 +844,13 @@ void iavf_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc,
|
|
|
* the contents through e. It can also return how many events are
|
|
|
* left to process through 'pending'
|
|
|
**/
|
|
|
-i40e_status iavf_clean_arq_element(struct i40e_hw *hw,
|
|
|
+iavf_status iavf_clean_arq_element(struct i40e_hw *hw,
|
|
|
struct i40e_arq_event_info *e,
|
|
|
u16 *pending)
|
|
|
{
|
|
|
- i40e_status ret_code = 0;
|
|
|
u16 ntc = hw->aq.arq.next_to_clean;
|
|
|
struct i40e_aq_desc *desc;
|
|
|
+ iavf_status ret_code = 0;
|
|
|
struct i40e_dma_mem *bi;
|
|
|
u16 desc_idx;
|
|
|
u16 datalen;
|
|
@@ -897,7 +896,7 @@ i40e_status iavf_clean_arq_element(struct i40e_hw *hw,
|
|
|
e->desc = *desc;
|
|
|
datalen = le16_to_cpu(desc->datalen);
|
|
|
e->msg_len = min(datalen, e->buf_len);
|
|
|
- if (e->msg_buf != NULL && (e->msg_len != 0))
|
|
|
+ if (e->msg_buf && (e->msg_len != 0))
|
|
|
memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va,
|
|
|
e->msg_len);
|
|
|
|
|
@@ -930,7 +929,7 @@ i40e_status iavf_clean_arq_element(struct i40e_hw *hw,
|
|
|
|
|
|
clean_arq_element_out:
|
|
|
/* Set pending if needed, unlock and return */
|
|
|
- if (pending != NULL)
|
|
|
+ if (pending)
|
|
|
*pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc);
|
|
|
|
|
|
clean_arq_element_err:
|