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@@ -265,8 +265,7 @@ static void __init zynq_clk_setup(struct device_node *np)
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pr_warn("ps_clk frequency not specified, using 33 MHz.\n");
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tmp = 33333333;
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}
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- ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, CLK_IS_ROOT,
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- tmp);
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+ ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, 0, tmp);
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/* PLLs */
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clk = clk_register_zynq_pll("armpll_int", "ps_clk", SLCR_ARMPLL_CTRL,
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