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@@ -491,6 +491,17 @@ static void azx_init_pci(struct azx *chip)
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}
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}
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+static void hda_intel_init_chip(struct azx *chip, bool full_reset)
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+{
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+ struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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+
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+ if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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+ hda_set_codec_wakeup(hda, true);
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+ azx_init_chip(chip, full_reset);
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+ if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
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+ hda_set_codec_wakeup(hda, false);
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+}
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+
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/* calculate runtime delay from LPIB */
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static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
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unsigned int pos)
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@@ -850,7 +861,7 @@ static int azx_resume(struct device *dev)
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return -EIO;
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azx_init_pci(chip);
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- azx_init_chip(chip, true);
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+ hda_intel_init_chip(chip, true);
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snd_power_change_state(card, SNDRV_CTL_POWER_D0);
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return 0;
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@@ -912,13 +923,16 @@ static int azx_runtime_resume(struct device *dev)
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&& hda->need_i915_power) {
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hda_display_power(hda, true);
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haswell_set_bclk(hda);
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+ /* toggle codec wakeup bit for STATESTS read */
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+ hda_set_codec_wakeup(hda, true);
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+ hda_set_codec_wakeup(hda, false);
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}
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/* Read STATESTS before controller reset */
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status = azx_readw(chip, STATESTS);
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azx_init_pci(chip);
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- azx_init_chip(chip, true);
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+ hda_intel_init_chip(chip, true);
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if (status) {
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list_for_each_codec(codec, &chip->bus)
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@@ -1629,7 +1643,7 @@ static int azx_first_init(struct azx *chip)
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haswell_set_bclk(hda);
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}
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- azx_init_chip(chip, (probe_only[dev] & 2) == 0);
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+ hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
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/* codec detection */
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if (!azx_bus(chip)->codec_mask) {
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