|
@@ -2794,7 +2794,7 @@
|
|
|
#define I40E_GLV_RUPP_MAX_INDEX 383
|
|
|
#define I40E_GLV_RUPP_RUPP_SHIFT 0
|
|
|
#define I40E_GLV_RUPP_RUPP_MASK I40E_MASK(0xFFFFFFFF, I40E_GLV_RUPP_RUPP_SHIFT)
|
|
|
-#define I40E_GLV_TEPC(_VSI) (0x00344000 + ((_VSI) * 4)) /* _i=0...383 */ /* Reset: CORER */
|
|
|
+#define I40E_GLV_TEPC(_i) (0x00344000 + ((_i) * 8)) /* _i=0...383 */ /* Reset: CORER */
|
|
|
#define I40E_GLV_TEPC_MAX_INDEX 383
|
|
|
#define I40E_GLV_TEPC_TEPC_SHIFT 0
|
|
|
#define I40E_GLV_TEPC_TEPC_MASK I40E_MASK(0xFFFFFFFF, I40E_GLV_TEPC_TEPC_SHIFT)
|