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@@ -390,13 +390,14 @@ err_icm:
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EXPORT_SYMBOL_GPL(mlx4_qp_alloc);
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#define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC
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-int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
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+int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
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enum mlx4_update_qp_attr attr,
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struct mlx4_update_qp_params *params)
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{
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_update_qp_context *cmd;
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u64 pri_addr_path_mask = 0;
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+ u64 qp_mask = 0;
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int err = 0;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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@@ -413,9 +414,16 @@ int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
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cmd->qp_context.pri_path.grh_mylmc = params->smac_index;
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}
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+ if (attr & MLX4_UPDATE_QP_VSD) {
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+ qp_mask |= 1ULL << MLX4_UPD_QP_MASK_VSD;
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+ if (params->flags & MLX4_UPDATE_QP_PARAMS_FLAGS_VSD_ENABLE)
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+ cmd->qp_context.param3 |= cpu_to_be32(MLX4_STRIP_VLAN);
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+ }
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+
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cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
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+ cmd->qp_mask = cpu_to_be64(qp_mask);
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- err = mlx4_cmd(dev, mailbox->dma, qp->qpn & 0xffffff, 0,
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+ err = mlx4_cmd(dev, mailbox->dma, qpn & 0xffffff, 0,
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MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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