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@@ -57,6 +57,7 @@ unsigned int do_pc3;
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unsigned int do_pc6;
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unsigned int do_pc7;
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unsigned int do_c8_c9_c10;
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+unsigned int do_skl_residency;
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unsigned int do_slm_cstates;
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unsigned int use_c1_residency_msr;
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unsigned int has_aperf;
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@@ -65,8 +66,6 @@ unsigned int units = 1000000; /* MHz etc */
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unsigned int genuine_intel;
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unsigned int has_invariant_tsc;
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unsigned int do_nhm_platform_info;
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-unsigned int do_nhm_turbo_ratio_limit;
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-unsigned int do_ivt_turbo_ratio_limit;
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unsigned int extra_msr_offset32;
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unsigned int extra_msr_offset64;
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unsigned int extra_delta_offset32;
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@@ -84,11 +83,14 @@ unsigned int do_dts;
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unsigned int do_ptm;
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unsigned int tcc_activation_temp;
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unsigned int tcc_activation_temp_override;
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-double rapl_power_units, rapl_energy_units, rapl_time_units;
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+double rapl_power_units, rapl_time_units;
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+double rapl_dram_energy_units, rapl_energy_units;
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double rapl_joule_counter_range;
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unsigned int do_core_perf_limit_reasons;
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unsigned int do_gfx_perf_limit_reasons;
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unsigned int do_ring_perf_limit_reasons;
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+unsigned int crystal_hz;
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+unsigned long long tsc_hz;
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#define RAPL_PKG (1 << 0)
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/* 0x610 MSR_PKG_POWER_LIMIT */
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@@ -101,18 +103,18 @@ unsigned int do_ring_perf_limit_reasons;
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#define RAPL_DRAM (1 << 3)
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/* 0x618 MSR_DRAM_POWER_LIMIT */
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/* 0x619 MSR_DRAM_ENERGY_STATUS */
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- /* 0x61c MSR_DRAM_POWER_INFO */
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#define RAPL_DRAM_PERF_STATUS (1 << 4)
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/* 0x61b MSR_DRAM_PERF_STATUS */
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+#define RAPL_DRAM_POWER_INFO (1 << 5)
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+ /* 0x61c MSR_DRAM_POWER_INFO */
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-#define RAPL_CORES (1 << 5)
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+#define RAPL_CORES (1 << 6)
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/* 0x638 MSR_PP0_POWER_LIMIT */
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/* 0x639 MSR_PP0_ENERGY_STATUS */
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-#define RAPL_CORE_POLICY (1 << 6)
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+#define RAPL_CORE_POLICY (1 << 7)
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/* 0x63a MSR_PP0_POLICY */
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-
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-#define RAPL_GFX (1 << 7)
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+#define RAPL_GFX (1 << 8)
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/* 0x640 MSR_PP1_POWER_LIMIT */
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/* 0x641 MSR_PP1_ENERGY_STATUS */
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/* 0x642 MSR_PP1_POLICY */
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@@ -159,6 +161,10 @@ struct pkg_data {
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unsigned long long pc8;
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unsigned long long pc9;
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unsigned long long pc10;
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+ unsigned long long pkg_wtd_core_c0;
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+ unsigned long long pkg_any_core_c0;
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+ unsigned long long pkg_any_gfxe_c0;
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+ unsigned long long pkg_both_core_gfxe_c0;
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unsigned int package_id;
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unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
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unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
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@@ -292,8 +298,7 @@ void print_header(void)
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if (has_aperf)
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outp += sprintf(outp, " Bzy_MHz");
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outp += sprintf(outp, " TSC_MHz");
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- if (do_smi)
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- outp += sprintf(outp, " SMI");
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+
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if (extra_delta_offset32)
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outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
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if (extra_delta_offset64)
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@@ -302,6 +307,13 @@ void print_header(void)
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outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
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if (extra_msr_offset64)
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outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
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+
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+ if (!debug)
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+ goto done;
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+
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+ if (do_smi)
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+ outp += sprintf(outp, " SMI");
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+
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if (do_nhm_cstates)
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outp += sprintf(outp, " CPU%%c1");
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if (do_nhm_cstates && !do_slm_cstates)
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@@ -316,6 +328,13 @@ void print_header(void)
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if (do_ptm)
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outp += sprintf(outp, " PkgTmp");
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+ if (do_skl_residency) {
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+ outp += sprintf(outp, " Totl%%C0");
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+ outp += sprintf(outp, " Any%%C0");
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+ outp += sprintf(outp, " GFX%%C0");
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+ outp += sprintf(outp, " CPUGFX%%");
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+ }
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+
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if (do_pc2)
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outp += sprintf(outp, " Pkg%%pc2");
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if (do_pc3)
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@@ -359,6 +378,7 @@ void print_header(void)
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outp += sprintf(outp, " time");
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}
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+ done:
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outp += sprintf(outp, "\n");
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}
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@@ -396,6 +416,12 @@ int dump_counters(struct thread_data *t, struct core_data *c,
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if (p) {
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outp += sprintf(outp, "package: %d\n", p->package_id);
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+
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+ outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
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+ outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
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+ outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
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+ outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
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+
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outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
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if (do_pc3)
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outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
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@@ -487,10 +513,6 @@ int format_counters(struct thread_data *t, struct core_data *c,
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/* TSC_MHz */
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outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
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- /* SMI */
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- if (do_smi)
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- outp += sprintf(outp, "%8d", t->smi_count);
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-
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/* delta */
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if (extra_delta_offset32)
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outp += sprintf(outp, " %11llu", t->extra_delta32);
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@@ -506,6 +528,13 @@ int format_counters(struct thread_data *t, struct core_data *c,
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if (extra_msr_offset64)
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outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
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+ if (!debug)
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+ goto done;
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+
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+ /* SMI */
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+ if (do_smi)
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+ outp += sprintf(outp, "%8d", t->smi_count);
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+
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if (do_nhm_cstates) {
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if (!skip_c1)
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outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
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@@ -531,9 +560,18 @@ int format_counters(struct thread_data *t, struct core_data *c,
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if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
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goto done;
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+ /* PkgTmp */
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if (do_ptm)
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outp += sprintf(outp, "%8d", p->pkg_temp_c);
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+ /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
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+ if (do_skl_residency) {
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+ outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
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+ outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
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+ outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
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+ outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
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+ }
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+
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if (do_pc2)
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outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
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if (do_pc3)
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@@ -565,7 +603,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
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if (do_rapl & RAPL_GFX)
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outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
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if (do_rapl & RAPL_DRAM)
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- outp += sprintf(outp, fmt8, p->energy_dram * rapl_energy_units / interval_float);
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+ outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
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if (do_rapl & RAPL_PKG_PERF_STATUS)
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outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
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if (do_rapl & RAPL_DRAM_PERF_STATUS)
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@@ -582,7 +620,7 @@ int format_counters(struct thread_data *t, struct core_data *c,
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p->energy_gfx * rapl_energy_units);
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if (do_rapl & RAPL_DRAM)
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outp += sprintf(outp, fmt8,
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- p->energy_dram * rapl_energy_units);
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+ p->energy_dram * rapl_dram_energy_units);
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if (do_rapl & RAPL_PKG_PERF_STATUS)
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outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
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if (do_rapl & RAPL_DRAM_PERF_STATUS)
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@@ -636,6 +674,13 @@ void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_
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void
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delta_package(struct pkg_data *new, struct pkg_data *old)
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{
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+
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+ if (do_skl_residency) {
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+ old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
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+ old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
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+ old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
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+ old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
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+ }
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old->pc2 = new->pc2 - old->pc2;
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if (do_pc3)
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old->pc3 = new->pc3 - old->pc3;
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@@ -782,6 +827,11 @@ void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data
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c->c7 = 0;
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c->core_temp_c = 0;
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+ p->pkg_wtd_core_c0 = 0;
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+ p->pkg_any_core_c0 = 0;
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+ p->pkg_any_gfxe_c0 = 0;
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+ p->pkg_both_core_gfxe_c0 = 0;
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+
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p->pc2 = 0;
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if (do_pc3)
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p->pc3 = 0;
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@@ -826,6 +876,13 @@ int sum_counters(struct thread_data *t, struct core_data *c,
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if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
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return 0;
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+ if (do_skl_residency) {
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+ average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
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+ average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
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+ average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
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+ average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
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+ }
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+
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average.packages.pc2 += p->pc2;
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if (do_pc3)
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average.packages.pc3 += p->pc3;
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@@ -873,6 +930,13 @@ void compute_average(struct thread_data *t, struct core_data *c,
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average.cores.c6 /= topo.num_cores;
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average.cores.c7 /= topo.num_cores;
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+ if (do_skl_residency) {
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+ average.packages.pkg_wtd_core_c0 /= topo.num_packages;
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+ average.packages.pkg_any_core_c0 /= topo.num_packages;
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+ average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
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+ average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
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+ }
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+
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average.packages.pc2 /= topo.num_packages;
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if (do_pc3)
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average.packages.pc3 /= topo.num_packages;
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@@ -979,6 +1043,16 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
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return 0;
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+ if (do_skl_residency) {
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+ if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
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+ return -10;
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+ if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
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+ return -11;
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+ if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
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+ return -12;
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+ if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
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+ return -13;
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+ }
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if (do_pc3)
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if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
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return -9;
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@@ -1055,49 +1129,77 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
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#define PCL_6R 9 /* PC6 Retention */
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#define PCL__7 10 /* PC7 */
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#define PCL_7S 11 /* PC7 Shrink */
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-#define PCLUNL 12 /* Unlimited */
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+#define PCL__8 12 /* PC8 */
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+#define PCL__9 13 /* PC9 */
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+#define PCLUNL 14 /* Unlimited */
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int pkg_cstate_limit = PCLUKN;
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char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
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- "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "unlimited"};
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+ "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
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-int nhm_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL};
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-int snb_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL};
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-int hsw_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL};
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-int slv_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7};
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-int amt_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
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-int phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};
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+int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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+int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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+int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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+int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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+int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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+int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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-void print_verbose_header(void)
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+static void
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+dump_nhm_platform_info(void)
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{
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unsigned long long msr;
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unsigned int ratio;
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- if (!do_nhm_platform_info)
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- return;
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-
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|
|
get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
|
|
|
|
|
|
fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
|
|
|
|
|
|
ratio = (msr >> 40) & 0xFF;
|
|
|
- fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
|
|
|
+ fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
|
|
|
ratio, bclk, ratio * bclk);
|
|
|
|
|
|
ratio = (msr >> 8) & 0xFF;
|
|
|
- fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n",
|
|
|
+ fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
|
|
|
ratio, bclk, ratio * bclk);
|
|
|
|
|
|
get_msr(0, MSR_IA32_POWER_CTL, &msr);
|
|
|
fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
|
|
|
msr, msr & 0x2 ? "EN" : "DIS");
|
|
|
|
|
|
- if (!do_ivt_turbo_ratio_limit)
|
|
|
- goto print_nhm_turbo_ratio_limits;
|
|
|
+ return;
|
|
|
+}
|
|
|
+
|
|
|
+static void
|
|
|
+dump_hsw_turbo_ratio_limits(void)
|
|
|
+{
|
|
|
+ unsigned long long msr;
|
|
|
+ unsigned int ratio;
|
|
|
+
|
|
|
+ get_msr(0, MSR_TURBO_RATIO_LIMIT2, &msr);
|
|
|
+
|
|
|
+ fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
|
|
|
+
|
|
|
+ ratio = (msr >> 8) & 0xFF;
|
|
|
+ if (ratio)
|
|
|
+ fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
|
|
|
+ ratio, bclk, ratio * bclk);
|
|
|
+
|
|
|
+ ratio = (msr >> 0) & 0xFF;
|
|
|
+ if (ratio)
|
|
|
+ fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
|
|
|
+ ratio, bclk, ratio * bclk);
|
|
|
+ return;
|
|
|
+}
|
|
|
+
|
|
|
+static void
|
|
|
+dump_ivt_turbo_ratio_limits(void)
|
|
|
+{
|
|
|
+ unsigned long long msr;
|
|
|
+ unsigned int ratio;
|
|
|
|
|
|
- get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr);
|
|
|
+ get_msr(0, MSR_TURBO_RATIO_LIMIT1, &msr);
|
|
|
|
|
|
- fprintf(stderr, "cpu0: MSR_IVT_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
|
|
|
+ fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
|
|
|
|
|
|
ratio = (msr >> 56) & 0xFF;
|
|
|
if (ratio)
|
|
|
@@ -1138,30 +1240,18 @@ void print_verbose_header(void)
|
|
|
if (ratio)
|
|
|
fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
|
|
|
ratio, bclk, ratio * bclk);
|
|
|
+ return;
|
|
|
+}
|
|
|
|
|
|
-print_nhm_turbo_ratio_limits:
|
|
|
- get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
|
|
|
-
|
|
|
-#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
|
|
|
-#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
|
|
|
-
|
|
|
- fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
|
|
|
-
|
|
|
- fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
|
|
|
- (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
|
|
|
- (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
|
|
|
- (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
|
|
|
- (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
|
|
|
- (msr & (1 << 15)) ? "" : "UN",
|
|
|
- (unsigned int)msr & 7,
|
|
|
- pkg_cstate_limit_strings[pkg_cstate_limit]);
|
|
|
-
|
|
|
- if (!do_nhm_turbo_ratio_limit)
|
|
|
- return;
|
|
|
+static void
|
|
|
+dump_nhm_turbo_ratio_limits(void)
|
|
|
+{
|
|
|
+ unsigned long long msr;
|
|
|
+ unsigned int ratio;
|
|
|
|
|
|
- get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
|
|
|
+ get_msr(0, MSR_TURBO_RATIO_LIMIT, &msr);
|
|
|
|
|
|
- fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
|
|
|
+ fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
|
|
|
|
|
|
ratio = (msr >> 56) & 0xFF;
|
|
|
if (ratio)
|
|
|
@@ -1202,7 +1292,30 @@ print_nhm_turbo_ratio_limits:
|
|
|
if (ratio)
|
|
|
fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
|
|
|
ratio, bclk, ratio * bclk);
|
|
|
+ return;
|
|
|
+}
|
|
|
+
|
|
|
+static void
|
|
|
+dump_nhm_cst_cfg(void)
|
|
|
+{
|
|
|
+ unsigned long long msr;
|
|
|
+
|
|
|
+ get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
|
|
|
+
|
|
|
+#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
|
|
|
+#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
|
|
|
|
|
|
+ fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
|
|
|
+
|
|
|
+ fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
|
|
|
+ (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
|
|
|
+ (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
|
|
|
+ (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
|
|
|
+ (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
|
|
|
+ (msr & (1 << 15)) ? "" : "UN",
|
|
|
+ (unsigned int)msr & 7,
|
|
|
+ pkg_cstate_limit_strings[pkg_cstate_limit]);
|
|
|
+ return;
|
|
|
}
|
|
|
|
|
|
void free_all_buffers(void)
|
|
|
@@ -1483,7 +1596,8 @@ void check_dev_msr()
|
|
|
struct stat sb;
|
|
|
|
|
|
if (stat("/dev/cpu/0/msr", &sb))
|
|
|
- err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
|
|
|
+ if (system("/sbin/modprobe msr > /dev/null 2>&1"))
|
|
|
+ err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
|
|
|
}
|
|
|
|
|
|
void check_permissions()
|
|
|
@@ -1573,6 +1687,8 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
|
|
|
case 0x47: /* BDW */
|
|
|
case 0x4F: /* BDX */
|
|
|
case 0x56: /* BDX-DE */
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
pkg_cstate_limits = hsw_pkg_cstate_limits;
|
|
|
break;
|
|
|
case 0x37: /* BYT */
|
|
|
@@ -1590,7 +1706,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
|
|
|
}
|
|
|
get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
|
|
|
|
|
|
- pkg_cstate_limit = pkg_cstate_limits[msr & 0x7];
|
|
|
+ pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
|
|
|
|
|
|
return 1;
|
|
|
}
|
|
|
@@ -1615,12 +1731,49 @@ int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
|
|
|
|
|
|
switch (model) {
|
|
|
case 0x3E: /* IVB Xeon */
|
|
|
+ case 0x3F: /* HSW Xeon */
|
|
|
+ return 1;
|
|
|
+ default:
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+}
|
|
|
+int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
|
|
|
+{
|
|
|
+ if (!genuine_intel)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if (family != 6)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ switch (model) {
|
|
|
+ case 0x3F: /* HSW Xeon */
|
|
|
return 1;
|
|
|
default:
|
|
|
return 0;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+static void
|
|
|
+dump_cstate_pstate_config_info(family, model)
|
|
|
+{
|
|
|
+ if (!do_nhm_platform_info)
|
|
|
+ return;
|
|
|
+
|
|
|
+ dump_nhm_platform_info();
|
|
|
+
|
|
|
+ if (has_hsw_turbo_ratio_limit(family, model))
|
|
|
+ dump_hsw_turbo_ratio_limits();
|
|
|
+
|
|
|
+ if (has_ivt_turbo_ratio_limit(family, model))
|
|
|
+ dump_ivt_turbo_ratio_limits();
|
|
|
+
|
|
|
+ if (has_nhm_turbo_ratio_limit(family, model))
|
|
|
+ dump_nhm_turbo_ratio_limits();
|
|
|
+
|
|
|
+ dump_nhm_cst_cfg();
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
/*
|
|
|
* print_epb()
|
|
|
* Decode the ENERGY_PERF_BIAS MSR
|
|
|
@@ -1690,35 +1843,35 @@ int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data
|
|
|
get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
|
|
|
fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
|
|
|
fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
|
|
|
- (msr & 1 << 0) ? "PROCHOT, " : "",
|
|
|
- (msr & 1 << 1) ? "ThermStatus, " : "",
|
|
|
- (msr & 1 << 2) ? "bit2, " : "",
|
|
|
- (msr & 1 << 4) ? "Graphics, " : "",
|
|
|
- (msr & 1 << 5) ? "Auto-HWP, " : "",
|
|
|
- (msr & 1 << 6) ? "VR-Therm, " : "",
|
|
|
- (msr & 1 << 8) ? "Amps, " : "",
|
|
|
- (msr & 1 << 9) ? "CorePwr, " : "",
|
|
|
- (msr & 1 << 10) ? "PkgPwrL1, " : "",
|
|
|
- (msr & 1 << 11) ? "PkgPwrL2, " : "",
|
|
|
- (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
|
|
|
- (msr & 1 << 13) ? "Transitions, " : "",
|
|
|
+ (msr & 1 << 15) ? "bit15, " : "",
|
|
|
(msr & 1 << 14) ? "bit14, " : "",
|
|
|
- (msr & 1 << 15) ? "bit15, " : "");
|
|
|
+ (msr & 1 << 13) ? "Transitions, " : "",
|
|
|
+ (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
|
|
|
+ (msr & 1 << 11) ? "PkgPwrL2, " : "",
|
|
|
+ (msr & 1 << 10) ? "PkgPwrL1, " : "",
|
|
|
+ (msr & 1 << 9) ? "CorePwr, " : "",
|
|
|
+ (msr & 1 << 8) ? "Amps, " : "",
|
|
|
+ (msr & 1 << 6) ? "VR-Therm, " : "",
|
|
|
+ (msr & 1 << 5) ? "Auto-HWP, " : "",
|
|
|
+ (msr & 1 << 4) ? "Graphics, " : "",
|
|
|
+ (msr & 1 << 2) ? "bit2, " : "",
|
|
|
+ (msr & 1 << 1) ? "ThermStatus, " : "",
|
|
|
+ (msr & 1 << 0) ? "PROCHOT, " : "");
|
|
|
fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
|
|
|
- (msr & 1 << 16) ? "PROCHOT, " : "",
|
|
|
- (msr & 1 << 17) ? "ThermStatus, " : "",
|
|
|
- (msr & 1 << 18) ? "bit18, " : "",
|
|
|
- (msr & 1 << 20) ? "Graphics, " : "",
|
|
|
- (msr & 1 << 21) ? "Auto-HWP, " : "",
|
|
|
- (msr & 1 << 22) ? "VR-Therm, " : "",
|
|
|
- (msr & 1 << 24) ? "Amps, " : "",
|
|
|
- (msr & 1 << 25) ? "CorePwr, " : "",
|
|
|
- (msr & 1 << 26) ? "PkgPwrL1, " : "",
|
|
|
- (msr & 1 << 27) ? "PkgPwrL2, " : "",
|
|
|
- (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
|
|
|
- (msr & 1 << 29) ? "Transitions, " : "",
|
|
|
+ (msr & 1 << 31) ? "bit31, " : "",
|
|
|
(msr & 1 << 30) ? "bit30, " : "",
|
|
|
- (msr & 1 << 31) ? "bit31, " : "");
|
|
|
+ (msr & 1 << 29) ? "Transitions, " : "",
|
|
|
+ (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
|
|
|
+ (msr & 1 << 27) ? "PkgPwrL2, " : "",
|
|
|
+ (msr & 1 << 26) ? "PkgPwrL1, " : "",
|
|
|
+ (msr & 1 << 25) ? "CorePwr, " : "",
|
|
|
+ (msr & 1 << 24) ? "Amps, " : "",
|
|
|
+ (msr & 1 << 22) ? "VR-Therm, " : "",
|
|
|
+ (msr & 1 << 21) ? "Auto-HWP, " : "",
|
|
|
+ (msr & 1 << 20) ? "Graphics, " : "",
|
|
|
+ (msr & 1 << 18) ? "bit18, " : "",
|
|
|
+ (msr & 1 << 17) ? "ThermStatus, " : "",
|
|
|
+ (msr & 1 << 16) ? "PROCHOT, " : "");
|
|
|
|
|
|
}
|
|
|
if (do_gfx_perf_limit_reasons) {
|
|
|
@@ -1784,6 +1937,25 @@ double get_tdp(model)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+/*
|
|
|
+ * rapl_dram_energy_units_probe()
|
|
|
+ * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
|
|
|
+ */
|
|
|
+static double
|
|
|
+rapl_dram_energy_units_probe(int model, double rapl_energy_units)
|
|
|
+{
|
|
|
+ /* only called for genuine_intel, family 6 */
|
|
|
+
|
|
|
+ switch (model) {
|
|
|
+ case 0x3F: /* HSX */
|
|
|
+ case 0x4F: /* BDX */
|
|
|
+ case 0x56: /* BDX-DE */
|
|
|
+ return (rapl_dram_energy_units = 15.3 / 1000000);
|
|
|
+ default:
|
|
|
+ return (rapl_energy_units);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
|
|
|
/*
|
|
|
* rapl_probe()
|
|
|
@@ -1812,14 +1984,18 @@ void rapl_probe(unsigned int family, unsigned int model)
|
|
|
case 0x47: /* BDW */
|
|
|
do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
|
|
|
break;
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
+ do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
|
|
|
+ break;
|
|
|
case 0x3F: /* HSX */
|
|
|
case 0x4F: /* BDX */
|
|
|
case 0x56: /* BDX-DE */
|
|
|
- do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
|
|
|
+ do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
|
|
|
break;
|
|
|
case 0x2D:
|
|
|
case 0x3E:
|
|
|
- do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
|
|
|
+ do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
|
|
|
break;
|
|
|
case 0x37: /* BYT */
|
|
|
case 0x4D: /* AVN */
|
|
|
@@ -1839,6 +2015,8 @@ void rapl_probe(unsigned int family, unsigned int model)
|
|
|
else
|
|
|
rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
|
|
|
|
|
|
+ rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
|
|
|
+
|
|
|
time_unit = msr >> 16 & 0xF;
|
|
|
if (time_unit == 0)
|
|
|
time_unit = 0xA;
|
|
|
@@ -2009,19 +2187,18 @@ int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
|
|
|
((msr >> 48) & 1) ? "EN" : "DIS");
|
|
|
}
|
|
|
|
|
|
- if (do_rapl & RAPL_DRAM) {
|
|
|
+ if (do_rapl & RAPL_DRAM_POWER_INFO) {
|
|
|
if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
|
|
|
return -6;
|
|
|
|
|
|
-
|
|
|
fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
|
|
|
cpu, msr,
|
|
|
((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
|
|
|
((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
|
|
|
((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
|
|
|
((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
|
|
|
-
|
|
|
-
|
|
|
+ }
|
|
|
+ if (do_rapl & RAPL_DRAM) {
|
|
|
if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
|
|
|
return -9;
|
|
|
fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
|
|
|
@@ -2090,6 +2267,8 @@ int has_snb_msrs(unsigned int family, unsigned int model)
|
|
|
case 0x47: /* BDW */
|
|
|
case 0x4F: /* BDX */
|
|
|
case 0x56: /* BDX-DE */
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
return 1;
|
|
|
}
|
|
|
return 0;
|
|
|
@@ -2110,11 +2289,35 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
|
|
|
switch (model) {
|
|
|
case 0x45: /* HSW */
|
|
|
case 0x3D: /* BDW */
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
return 1;
|
|
|
}
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+/*
|
|
|
+ * SKL adds support for additional MSRS:
|
|
|
+ *
|
|
|
+ * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
|
|
|
+ * MSR_PKG_ANY_CORE_C0_RES 0x00000659
|
|
|
+ * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
|
|
|
+ * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
|
|
|
+ */
|
|
|
+int has_skl_msrs(unsigned int family, unsigned int model)
|
|
|
+{
|
|
|
+ if (!genuine_intel)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ switch (model) {
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
|
|
|
int is_slm(unsigned int family, unsigned int model)
|
|
|
{
|
|
|
@@ -2228,7 +2431,7 @@ guess:
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
|
-void check_cpuid()
|
|
|
+void process_cpuid()
|
|
|
{
|
|
|
unsigned int eax, ebx, ecx, edx, max_level;
|
|
|
unsigned int fms, family, model, stepping;
|
|
|
@@ -2294,6 +2497,41 @@ void check_cpuid()
|
|
|
do_ptm ? "" : "No ",
|
|
|
has_epb ? "" : "No ");
|
|
|
|
|
|
+ if (max_level > 0x15) {
|
|
|
+ unsigned int eax_crystal;
|
|
|
+ unsigned int ebx_tsc;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
|
|
|
+ */
|
|
|
+ eax_crystal = ebx_tsc = crystal_hz = edx = 0;
|
|
|
+ __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
|
|
|
+
|
|
|
+ if (ebx_tsc != 0) {
|
|
|
+
|
|
|
+ if (debug && (ebx != 0))
|
|
|
+ fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
|
|
|
+ eax_crystal, ebx_tsc, crystal_hz);
|
|
|
+
|
|
|
+ if (crystal_hz == 0)
|
|
|
+ switch(model) {
|
|
|
+ case 0x4E: /* SKL */
|
|
|
+ case 0x5E: /* SKL */
|
|
|
+ crystal_hz = 24000000; /* 24 MHz */
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ crystal_hz = 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (crystal_hz) {
|
|
|
+ tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
|
|
|
+ if (debug)
|
|
|
+ fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
|
|
|
+ tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
|
|
|
do_snb_cstates = has_snb_msrs(family, model);
|
|
|
do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
|
|
|
@@ -2301,18 +2539,19 @@ void check_cpuid()
|
|
|
do_pc6 = (pkg_cstate_limit >= PCL__6);
|
|
|
do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
|
|
|
do_c8_c9_c10 = has_hsw_msrs(family, model);
|
|
|
+ do_skl_residency = has_skl_msrs(family, model);
|
|
|
do_slm_cstates = is_slm(family, model);
|
|
|
bclk = discover_bclk(family, model);
|
|
|
|
|
|
- do_nhm_turbo_ratio_limit = do_nhm_platform_info && has_nhm_turbo_ratio_limit(family, model);
|
|
|
- do_ivt_turbo_ratio_limit = has_ivt_turbo_ratio_limit(family, model);
|
|
|
rapl_probe(family, model);
|
|
|
perf_limit_reasons_probe(family, model);
|
|
|
|
|
|
+ if (debug)
|
|
|
+ dump_cstate_pstate_config_info();
|
|
|
+
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
-
|
|
|
void help()
|
|
|
{
|
|
|
fprintf(stderr,
|
|
|
@@ -2428,14 +2667,14 @@ void topology_probe()
|
|
|
if (debug > 1)
|
|
|
fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
|
|
|
max_core_id, topo.num_cores_per_pkg);
|
|
|
- if (!summary_only && topo.num_cores_per_pkg > 1)
|
|
|
+ if (debug && !summary_only && topo.num_cores_per_pkg > 1)
|
|
|
show_core = 1;
|
|
|
|
|
|
topo.num_packages = max_package_id + 1;
|
|
|
if (debug > 1)
|
|
|
fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
|
|
|
max_package_id, topo.num_packages);
|
|
|
- if (!summary_only && topo.num_packages > 1)
|
|
|
+ if (debug && !summary_only && topo.num_packages > 1)
|
|
|
show_pkg = 1;
|
|
|
|
|
|
topo.num_threads_per_core = max_siblings;
|
|
|
@@ -2550,13 +2789,10 @@ void turbostat_init()
|
|
|
{
|
|
|
check_dev_msr();
|
|
|
check_permissions();
|
|
|
- check_cpuid();
|
|
|
+ process_cpuid();
|
|
|
|
|
|
setup_all_buffers();
|
|
|
|
|
|
- if (debug)
|
|
|
- print_verbose_header();
|
|
|
-
|
|
|
if (debug)
|
|
|
for_all_cpus(print_epb, ODD_COUNTERS);
|
|
|
|
|
|
@@ -2634,7 +2870,7 @@ int get_and_dump_counters(void)
|
|
|
}
|
|
|
|
|
|
void print_version() {
|
|
|
- fprintf(stderr, "turbostat version 4.1 10-Feb, 2015"
|
|
|
+ fprintf(stderr, "turbostat version 4.5 2 Apr, 2015"
|
|
|
" - Len Brown <lenb@kernel.org>\n");
|
|
|
}
|
|
|
|
Linus Torvalds