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@@ -34,26 +34,31 @@
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/*
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* Generic IO read/write. These perform native-endian accesses.
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*/
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+#define __raw_writeb __raw_writeb
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static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
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{
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asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr));
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}
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+#define __raw_writew __raw_writew
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static inline void __raw_writew(u16 val, volatile void __iomem *addr)
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{
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asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr));
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}
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+#define __raw_writel __raw_writel
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static inline void __raw_writel(u32 val, volatile void __iomem *addr)
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{
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asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr));
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}
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+#define __raw_writeq __raw_writeq
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static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
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{
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asm volatile("str %0, [%1]" : : "r" (val), "r" (addr));
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}
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+#define __raw_readb __raw_readb
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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u8 val;
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@@ -61,6 +66,7 @@ static inline u8 __raw_readb(const volatile void __iomem *addr)
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return val;
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}
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+#define __raw_readw __raw_readw
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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u16 val;
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@@ -68,6 +74,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
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return val;
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}
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+#define __raw_readl __raw_readl
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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u32 val;
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@@ -75,6 +82,7 @@ static inline u32 __raw_readl(const volatile void __iomem *addr)
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return val;
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}
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+#define __raw_readq __raw_readq
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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u64 val;
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@@ -125,94 +133,6 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
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#define IO_SPACE_LIMIT (SZ_32M - 1)
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#define PCI_IOBASE ((void __iomem *)(MODULES_VADDR - SZ_32M))
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-static inline u8 inb(unsigned long addr)
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-{
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- return readb(addr + PCI_IOBASE);
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-}
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-
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-static inline u16 inw(unsigned long addr)
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-{
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- return readw(addr + PCI_IOBASE);
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-}
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-
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-static inline u32 inl(unsigned long addr)
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-{
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- return readl(addr + PCI_IOBASE);
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-}
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-
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-static inline void outb(u8 b, unsigned long addr)
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-{
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- writeb(b, addr + PCI_IOBASE);
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-}
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-
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-static inline void outw(u16 b, unsigned long addr)
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-{
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- writew(b, addr + PCI_IOBASE);
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-}
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-
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-static inline void outl(u32 b, unsigned long addr)
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-{
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- writel(b, addr + PCI_IOBASE);
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-}
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-
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-#define inb_p(addr) inb(addr)
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-#define inw_p(addr) inw(addr)
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-#define inl_p(addr) inl(addr)
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-
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-#define outb_p(x, addr) outb((x), (addr))
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-#define outw_p(x, addr) outw((x), (addr))
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-#define outl_p(x, addr) outl((x), (addr))
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-
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-static inline void insb(unsigned long addr, void *buffer, int count)
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-{
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- u8 *buf = buffer;
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- while (count--)
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- *buf++ = __raw_readb(addr + PCI_IOBASE);
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-}
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-
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-static inline void insw(unsigned long addr, void *buffer, int count)
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-{
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- u16 *buf = buffer;
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- while (count--)
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- *buf++ = __raw_readw(addr + PCI_IOBASE);
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-}
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-
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-static inline void insl(unsigned long addr, void *buffer, int count)
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-{
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- u32 *buf = buffer;
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- while (count--)
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- *buf++ = __raw_readl(addr + PCI_IOBASE);
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-}
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-
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-static inline void outsb(unsigned long addr, const void *buffer, int count)
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-{
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- const u8 *buf = buffer;
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- while (count--)
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- __raw_writeb(*buf++, addr + PCI_IOBASE);
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-}
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-
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-static inline void outsw(unsigned long addr, const void *buffer, int count)
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-{
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- const u16 *buf = buffer;
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- while (count--)
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- __raw_writew(*buf++, addr + PCI_IOBASE);
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-}
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-
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-static inline void outsl(unsigned long addr, const void *buffer, int count)
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-{
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- const u32 *buf = buffer;
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- while (count--)
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- __raw_writel(*buf++, addr + PCI_IOBASE);
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-}
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-
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-#define insb_p(port,to,len) insb(port,to,len)
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-#define insw_p(port,to,len) insw(port,to,len)
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-#define insl_p(port,to,len) insl(port,to,len)
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-
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-#define outsb_p(port,from,len) outsb(port,from,len)
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-#define outsw_p(port,from,len) outsw(port,from,len)
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-#define outsl_p(port,from,len) outsl(port,from,len)
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-
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/*
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* String version of I/O memory access operations.
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*/
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@@ -236,18 +156,14 @@ extern void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size);
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#define ioremap_wc(addr, size) __ioremap((addr), (size), __pgprot(PROT_NORMAL_NC))
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#define iounmap __iounmap
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-#define ARCH_HAS_IOREMAP_WC
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-#include <asm-generic/iomap.h>
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-
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/*
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- * More restrictive address range checking than the default implementation
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- * (PHYS_OFFSET and PHYS_MASK taken into account).
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+ * io{read,write}{16,32}be() macros
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*/
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-#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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-extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
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-extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
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+#define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
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+#define ioread32be(p) ({ __u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
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-extern int devmem_is_allowed(unsigned long pfn);
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+#define iowrite16be(v,p) ({ __iowmb(); __raw_writew((__force __u16)cpu_to_be16(v), p); })
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+#define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); })
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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@@ -260,6 +176,18 @@ extern int devmem_is_allowed(unsigned long pfn);
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*/
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#define xlate_dev_kmem_ptr(p) p
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+#include <asm-generic/io.h>
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+
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+/*
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+ * More restrictive address range checking than the default implementation
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+ * (PHYS_OFFSET and PHYS_MASK taken into account).
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+ */
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+#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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+extern int valid_phys_addr_range(phys_addr_t addr, size_t size);
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+extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
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+
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+extern int devmem_is_allowed(unsigned long pfn);
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+
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struct bio_vec;
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extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
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const struct bio_vec *vec2);
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