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@@ -890,6 +890,31 @@ static int pm_suspend_exit_cb(void)
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goto out;
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}
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+ /*
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+ * Due to some design limitations in the firmware, sometimes the
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+ * counters do not get updated by the time we reach here. As a
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+ * workaround, we try to see if this was a genuine case of sleep
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+ * failure or not by cross-checking from PMC GCR registers directly.
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+ */
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+ if (suspend_shlw_ctr_exit == suspend_shlw_ctr_temp &&
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+ suspend_deep_ctr_exit == suspend_deep_ctr_temp) {
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+ ret = intel_pmc_gcr_read64(PMC_GCR_TELEM_SHLW_S0IX_REG,
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+ &suspend_shlw_res_exit);
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+ if (ret < 0)
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+ goto out;
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+
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+ ret = intel_pmc_gcr_read64(PMC_GCR_TELEM_DEEP_S0IX_REG,
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+ &suspend_deep_res_exit);
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+ if (ret < 0)
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+ goto out;
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+
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+ if (suspend_shlw_res_exit > suspend_shlw_res_temp)
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+ suspend_shlw_ctr_exit++;
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+
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+ if (suspend_deep_res_exit > suspend_deep_res_temp)
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+ suspend_deep_ctr_exit++;
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+ }
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+
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suspend_shlw_ctr_exit -= suspend_shlw_ctr_temp;
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suspend_deep_ctr_exit -= suspend_deep_ctr_temp;
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suspend_shlw_res_exit -= suspend_shlw_res_temp;
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