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@@ -4,6 +4,7 @@
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* SPDX-License-Identifier: GPL-2.0
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*/
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+#include <linux/delay.h>
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#include <linux/hwspinlock.h>
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#include <linux/init.h>
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#include <linux/io.h>
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@@ -12,6 +13,7 @@
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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+#include <linux/reboot.h>
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#include <linux/spi/spi.h>
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#include <linux/sizes.h>
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@@ -67,6 +69,40 @@
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#define ADI_READ_TIMEOUT 2000
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#define REG_ADDR_LOW_MASK GENMASK(11, 0)
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+/* Registers definitions for PMIC watchdog controller */
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+#define REG_WDG_LOAD_LOW 0x80
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+#define REG_WDG_LOAD_HIGH 0x84
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+#define REG_WDG_CTRL 0x88
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+#define REG_WDG_LOCK 0xa0
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+
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+/* Bits definitions for register REG_WDG_CTRL */
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+#define BIT_WDG_RUN BIT(1)
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+#define BIT_WDG_RST BIT(3)
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+
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+/* Registers definitions for PMIC */
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+#define PMIC_RST_STATUS 0xee8
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+#define PMIC_MODULE_EN 0xc08
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+#define PMIC_CLK_EN 0xc18
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+#define BIT_WDG_EN BIT(2)
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+
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+/* Definition of PMIC reset status register */
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+#define HWRST_STATUS_RECOVERY 0x20
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+#define HWRST_STATUS_NORMAL 0x40
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+#define HWRST_STATUS_ALARM 0x50
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+#define HWRST_STATUS_SLEEP 0x60
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+#define HWRST_STATUS_FASTBOOT 0x30
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+#define HWRST_STATUS_SPECIAL 0x70
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+#define HWRST_STATUS_PANIC 0x80
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+#define HWRST_STATUS_CFTREBOOT 0x90
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+#define HWRST_STATUS_AUTODLOADER 0xa0
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+#define HWRST_STATUS_IQMODE 0xb0
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+#define HWRST_STATUS_SPRDISK 0xc0
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+
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+/* Use default timeout 50 ms that converts to watchdog values */
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+#define WDG_LOAD_VAL ((50 * 1000) / 32768)
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+#define WDG_LOAD_MASK GENMASK(15, 0)
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+#define WDG_UNLOCK_KEY 0xe551
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+
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struct sprd_adi {
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struct spi_controller *ctlr;
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struct device *dev;
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@@ -74,6 +110,7 @@ struct sprd_adi {
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struct hwspinlock *hwlock;
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unsigned long slave_vbase;
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unsigned long slave_pbase;
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+ struct notifier_block restart_handler;
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};
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static int sprd_adi_check_paddr(struct sprd_adi *sadi, u32 paddr)
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@@ -123,7 +160,17 @@ static int sprd_adi_fifo_is_full(struct sprd_adi *sadi)
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static int sprd_adi_read(struct sprd_adi *sadi, u32 reg_paddr, u32 *read_val)
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{
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int read_timeout = ADI_READ_TIMEOUT;
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+ unsigned long flags;
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u32 val, rd_addr;
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+ int ret;
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+
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+ ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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+ ADI_HWSPINLOCK_TIMEOUT,
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+ &flags);
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+ if (ret) {
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+ dev_err(sadi->dev, "get the hw lock failed\n");
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+ return ret;
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+ }
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/*
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* Set the physical register address need to read into RD_CMD register,
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@@ -147,7 +194,8 @@ static int sprd_adi_read(struct sprd_adi *sadi, u32 reg_paddr, u32 *read_val)
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if (read_timeout == 0) {
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dev_err(sadi->dev, "ADI read timeout\n");
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- return -EBUSY;
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+ ret = -EBUSY;
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+ goto out;
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}
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/*
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@@ -161,21 +209,35 @@ static int sprd_adi_read(struct sprd_adi *sadi, u32 reg_paddr, u32 *read_val)
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if (rd_addr != (reg_paddr & REG_ADDR_LOW_MASK)) {
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dev_err(sadi->dev, "read error, reg addr = 0x%x, val = 0x%x\n",
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reg_paddr, val);
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- return -EIO;
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+ ret = -EIO;
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+ goto out;
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}
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*read_val = val & RD_VALUE_MASK;
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- return 0;
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+
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+out:
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+ hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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+ return ret;
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}
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-static int sprd_adi_write(struct sprd_adi *sadi, unsigned long reg, u32 val)
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+static int sprd_adi_write(struct sprd_adi *sadi, u32 reg_paddr, u32 val)
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{
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+ unsigned long reg = sprd_adi_to_vaddr(sadi, reg_paddr);
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u32 timeout = ADI_FIFO_DRAIN_TIMEOUT;
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+ unsigned long flags;
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int ret;
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+ ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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+ ADI_HWSPINLOCK_TIMEOUT,
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+ &flags);
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+ if (ret) {
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+ dev_err(sadi->dev, "get the hw lock failed\n");
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+ return ret;
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+ }
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+
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ret = sprd_adi_drain_fifo(sadi);
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if (ret < 0)
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- return ret;
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+ goto out;
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/*
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* we should wait for write fifo is empty before writing data to PMIC
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@@ -192,10 +254,12 @@ static int sprd_adi_write(struct sprd_adi *sadi, unsigned long reg, u32 val)
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if (timeout == 0) {
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dev_err(sadi->dev, "write fifo is full\n");
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- return -EBUSY;
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+ ret = -EBUSY;
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}
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- return 0;
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+out:
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+ hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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+ return ret;
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}
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static int sprd_adi_transfer_one(struct spi_controller *ctlr,
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@@ -203,7 +267,6 @@ static int sprd_adi_transfer_one(struct spi_controller *ctlr,
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struct spi_transfer *t)
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{
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struct sprd_adi *sadi = spi_controller_get_devdata(ctlr);
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- unsigned long flags, virt_reg;
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u32 phy_reg, val;
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int ret;
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@@ -214,16 +277,7 @@ static int sprd_adi_transfer_one(struct spi_controller *ctlr,
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if (ret)
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return ret;
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- ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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- ADI_HWSPINLOCK_TIMEOUT,
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- &flags);
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- if (ret) {
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- dev_err(sadi->dev, "get the hw lock failed\n");
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- return ret;
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- }
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-
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ret = sprd_adi_read(sadi, phy_reg, &val);
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- hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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if (ret)
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return ret;
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@@ -241,19 +295,8 @@ static int sprd_adi_transfer_one(struct spi_controller *ctlr,
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if (ret)
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return ret;
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- virt_reg = sprd_adi_to_vaddr(sadi, phy_reg);
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val = *p;
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-
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- ret = hwspin_lock_timeout_irqsave(sadi->hwlock,
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- ADI_HWSPINLOCK_TIMEOUT,
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- &flags);
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- if (ret) {
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- dev_err(sadi->dev, "get the hw lock failed\n");
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- return ret;
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- }
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-
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- ret = sprd_adi_write(sadi, virt_reg, val);
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- hwspin_unlock_irqrestore(sadi->hwlock, &flags);
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+ ret = sprd_adi_write(sadi, phy_reg, val);
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if (ret)
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return ret;
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} else {
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@@ -264,6 +307,72 @@ static int sprd_adi_transfer_one(struct spi_controller *ctlr,
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return 0;
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}
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+static int sprd_adi_restart_handler(struct notifier_block *this,
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+ unsigned long mode, void *cmd)
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+{
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+ struct sprd_adi *sadi = container_of(this, struct sprd_adi,
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+ restart_handler);
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+ u32 val, reboot_mode = 0;
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+
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+ if (!cmd)
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+ reboot_mode = HWRST_STATUS_NORMAL;
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+ else if (!strncmp(cmd, "recovery", 8))
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+ reboot_mode = HWRST_STATUS_RECOVERY;
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+ else if (!strncmp(cmd, "alarm", 5))
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+ reboot_mode = HWRST_STATUS_ALARM;
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+ else if (!strncmp(cmd, "fastsleep", 9))
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+ reboot_mode = HWRST_STATUS_SLEEP;
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+ else if (!strncmp(cmd, "bootloader", 10))
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+ reboot_mode = HWRST_STATUS_FASTBOOT;
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+ else if (!strncmp(cmd, "panic", 5))
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+ reboot_mode = HWRST_STATUS_PANIC;
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+ else if (!strncmp(cmd, "special", 7))
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+ reboot_mode = HWRST_STATUS_SPECIAL;
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+ else if (!strncmp(cmd, "cftreboot", 9))
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+ reboot_mode = HWRST_STATUS_CFTREBOOT;
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+ else if (!strncmp(cmd, "autodloader", 11))
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+ reboot_mode = HWRST_STATUS_AUTODLOADER;
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+ else if (!strncmp(cmd, "iqmode", 6))
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+ reboot_mode = HWRST_STATUS_IQMODE;
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+ else if (!strncmp(cmd, "sprdisk", 7))
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+ reboot_mode = HWRST_STATUS_SPRDISK;
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+ else
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+ reboot_mode = HWRST_STATUS_NORMAL;
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+
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+ /* Record the reboot mode */
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+ sprd_adi_read(sadi, sadi->slave_pbase + PMIC_RST_STATUS, &val);
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+ val |= reboot_mode;
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+ sprd_adi_write(sadi, sadi->slave_pbase + PMIC_RST_STATUS, val);
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+
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+ /* Enable the interface clock of the watchdog */
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+ sprd_adi_read(sadi, sadi->slave_pbase + PMIC_MODULE_EN, &val);
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+ val |= BIT_WDG_EN;
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+ sprd_adi_write(sadi, sadi->slave_pbase + PMIC_MODULE_EN, val);
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+
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+ /* Enable the work clock of the watchdog */
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+ sprd_adi_read(sadi, sadi->slave_pbase + PMIC_CLK_EN, &val);
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+ val |= BIT_WDG_EN;
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+ sprd_adi_write(sadi, sadi->slave_pbase + PMIC_CLK_EN, val);
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+
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+ /* Unlock the watchdog */
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+ sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOCK, WDG_UNLOCK_KEY);
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+
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+ /* Load the watchdog timeout value, 50ms is always enough. */
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+ sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW,
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+ WDG_LOAD_VAL & WDG_LOAD_MASK);
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+ sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0);
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+
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+ /* Start the watchdog to reset system */
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+ sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);
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+ val |= BIT_WDG_RUN | BIT_WDG_RST;
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+ sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_CTRL, val);
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+
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+ mdelay(1000);
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+
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+ dev_emerg(sadi->dev, "Unable to restart system\n");
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+ return NOTIFY_DONE;
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+}
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+
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static void sprd_adi_hw_init(struct sprd_adi *sadi)
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{
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struct device_node *np = sadi->dev->of_node;
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@@ -377,6 +486,14 @@ static int sprd_adi_probe(struct platform_device *pdev)
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goto free_hwlock;
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}
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+ sadi->restart_handler.notifier_call = sprd_adi_restart_handler;
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+ sadi->restart_handler.priority = 128;
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+ ret = register_restart_handler(&sadi->restart_handler);
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+ if (ret) {
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+ dev_err(&pdev->dev, "can not register restart handler\n");
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+ goto free_hwlock;
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+ }
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+
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return 0;
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free_hwlock:
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@@ -391,6 +508,7 @@ static int sprd_adi_remove(struct platform_device *pdev)
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struct spi_controller *ctlr = dev_get_drvdata(&pdev->dev);
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struct sprd_adi *sadi = spi_controller_get_devdata(ctlr);
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+ unregister_restart_handler(&sadi->restart_handler);
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hwspin_lock_free(sadi->hwlock);
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return 0;
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}
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