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@@ -63,8 +63,6 @@ static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
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static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
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static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
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unsigned int vmid);
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unsigned int vmid);
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-static int kgd_init_memory(struct kgd_dev *kgd);
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-
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static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
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static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
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uint32_t hpd_size, uint64_t hpd_gpu_addr);
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uint32_t hpd_size, uint64_t hpd_gpu_addr);
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@@ -89,7 +87,6 @@ static const struct kfd2kgd_calls kfd2kgd = {
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.get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
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.get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
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.program_sh_mem_settings = kgd_program_sh_mem_settings,
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.program_sh_mem_settings = kgd_program_sh_mem_settings,
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.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
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.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
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- .init_memory = kgd_init_memory,
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.init_pipeline = kgd_init_pipeline,
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.init_pipeline = kgd_init_pipeline,
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.hqd_load = kgd_hqd_load,
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.hqd_load = kgd_hqd_load,
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.hqd_sdma_load = kgd_hqd_sdma_load,
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.hqd_sdma_load = kgd_hqd_sdma_load,
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@@ -375,42 +372,6 @@ static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
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return 0;
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return 0;
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}
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}
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-static int kgd_init_memory(struct kgd_dev *kgd)
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-{
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- /*
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- * Configure apertures:
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- * LDS: 0x60000000'00000000 - 0x60000001'00000000 (4GB)
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- * Scratch: 0x60000001'00000000 - 0x60000002'00000000 (4GB)
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- * GPUVM: 0x60010000'00000000 - 0x60020000'00000000 (1TB)
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- */
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- int i;
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- uint32_t sh_mem_bases = PRIVATE_BASE(0x6000) | SHARED_BASE(0x6000);
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-
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- for (i = 8; i < 16; i++) {
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- uint32_t sh_mem_config;
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-
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- lock_srbm(kgd, 0, 0, 0, i);
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-
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- sh_mem_config = ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED);
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- sh_mem_config |= DEFAULT_MTYPE(MTYPE_NONCACHED);
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-
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- write_register(kgd, SH_MEM_CONFIG, sh_mem_config);
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-
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- write_register(kgd, SH_MEM_BASES, sh_mem_bases);
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-
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- /* Scratch aperture is not supported for now. */
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- write_register(kgd, SH_STATIC_MEM_CONFIG, 0);
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-
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- /* APE1 disabled for now. */
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- write_register(kgd, SH_MEM_APE1_BASE, 1);
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- write_register(kgd, SH_MEM_APE1_LIMIT, 0);
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-
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- unlock_srbm(kgd);
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- }
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-
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- return 0;
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-}
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-
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static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
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static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
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uint32_t hpd_size, uint64_t hpd_gpu_addr)
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uint32_t hpd_size, uint64_t hpd_gpu_addr)
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{
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{
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