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@@ -127,6 +127,9 @@
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#define ADV7180_REG_VPP_SLAVE_ADDR 0xFD
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#define ADV7180_REG_CSI_SLAVE_ADDR 0xFE
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+#define ADV7180_REG_FLCONTROL 0x40e0
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+#define ADV7180_FLCONTROL_FL_ENABLE 0x1
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+
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#define ADV7180_CSI_REG_PWRDN 0x00
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#define ADV7180_CSI_PWRDN 0x80
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@@ -164,6 +167,8 @@
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#define ADV7180_DEFAULT_CSI_I2C_ADDR 0x44
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#define ADV7180_DEFAULT_VPP_I2C_ADDR 0x42
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+#define V4L2_CID_ADV_FAST_SWITCH (V4L2_CID_USER_ADV7180_BASE + 0x00)
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+
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struct adv7180_state;
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#define ADV7180_FLAG_RESET_POWERED BIT(0)
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@@ -508,6 +513,18 @@ static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
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break;
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ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
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break;
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+ case V4L2_CID_ADV_FAST_SWITCH:
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+ if (ctrl->val) {
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+ /* ADI required write */
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+ adv7180_write(state, 0x80d9, 0x44);
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+ adv7180_write(state, ADV7180_REG_FLCONTROL,
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+ ADV7180_FLCONTROL_FL_ENABLE);
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+ } else {
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+ /* ADI required write */
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+ adv7180_write(state, 0x80d9, 0xc4);
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+ adv7180_write(state, ADV7180_REG_FLCONTROL, 0x00);
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+ }
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+ break;
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default:
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ret = -EINVAL;
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}
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@@ -520,6 +537,16 @@ static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
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.s_ctrl = adv7180_s_ctrl,
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};
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+static const struct v4l2_ctrl_config adv7180_ctrl_fast_switch = {
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+ .ops = &adv7180_ctrl_ops,
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+ .id = V4L2_CID_ADV_FAST_SWITCH,
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+ .name = "Fast Switching",
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+ .type = V4L2_CTRL_TYPE_BOOLEAN,
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+ .min = 0,
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+ .max = 1,
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+ .step = 1,
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+};
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+
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static int adv7180_init_controls(struct adv7180_state *state)
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{
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v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
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@@ -536,6 +563,8 @@ static int adv7180_init_controls(struct adv7180_state *state)
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v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
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V4L2_CID_HUE, ADV7180_HUE_MIN,
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ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
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+ v4l2_ctrl_new_custom(&state->ctrl_hdl, &adv7180_ctrl_fast_switch, NULL);
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+
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state->sd.ctrl_handler = &state->ctrl_hdl;
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if (state->ctrl_hdl.error) {
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int err = state->ctrl_hdl.error;
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