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@@ -958,3 +958,25 @@ void ath9k_hw_set_interrupts(struct ath_hw *ah)
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return;
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}
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EXPORT_SYMBOL(ath9k_hw_set_interrupts);
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+
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+#define ATH9K_HW_MAX_DCU 10
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+#define ATH9K_HW_SLICE_PER_DCU 16
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+#define ATH9K_HW_BIT_IN_SLICE 16
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+void ath9k_hw_set_tx_filter(struct ath_hw *ah, u8 destidx, bool set)
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+{
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+ int dcu_idx;
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+ u32 filter;
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+
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+ for (dcu_idx = 0; dcu_idx < 10; dcu_idx++) {
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+ filter = SM(set, AR_D_TXBLK_WRITE_COMMAND);
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+ filter |= SM(dcu_idx, AR_D_TXBLK_WRITE_DCU);
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+ filter |= SM((destidx / ATH9K_HW_SLICE_PER_DCU),
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+ AR_D_TXBLK_WRITE_SLICE);
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+ filter |= BIT(destidx % ATH9K_HW_BIT_IN_SLICE);
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+ ath_dbg(ath9k_hw_common(ah), PS,
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+ "DCU%d staid %d set %d txfilter %08x\n",
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+ dcu_idx, destidx, set, filter);
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+ REG_WRITE(ah, AR_D_TXBLK_BASE, filter);
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+ }
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+}
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+EXPORT_SYMBOL(ath9k_hw_set_tx_filter);
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