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@@ -401,21 +401,42 @@ static int qm_init_pfdr(struct device *dev, u32 pfdr_start, u32 num)
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}
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/*
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- * Ideally we would use the DMA API to turn rmem->base into a DMA address
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- * (especially if iommu translations ever get involved). Unfortunately, the
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- * DMA API currently does not allow mapping anything that is not backed with
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- * a struct page.
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+ * QMan needs two global memory areas initialized at boot time:
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+ * 1) FQD: Frame Queue Descriptors used to manage frame queues
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+ * 2) PFDR: Packed Frame Queue Descriptor Records used to store frames
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+ * Both areas are reserved using the device tree reserved memory framework
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+ * and the addresses and sizes are initialized when the QMan device is probed
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*/
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static dma_addr_t fqd_a, pfdr_a;
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static size_t fqd_sz, pfdr_sz;
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+#ifdef CONFIG_PPC
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+/*
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+ * Support for PPC Device Tree backward compatibility when compatible
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+ * string is set to fsl-qman-fqd and fsl-qman-pfdr
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+ */
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+static int zero_priv_mem(phys_addr_t addr, size_t sz)
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+{
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+ /* map as cacheable, non-guarded */
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+ void __iomem *tmpp = ioremap_prot(addr, sz, 0);
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+
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+ if (!tmpp)
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+ return -ENOMEM;
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+
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+ memset_io(tmpp, 0, sz);
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+ flush_dcache_range((unsigned long)tmpp,
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+ (unsigned long)tmpp + sz);
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+ iounmap(tmpp);
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+
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+ return 0;
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+}
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+
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static int qman_fqd(struct reserved_mem *rmem)
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{
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fqd_a = rmem->base;
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fqd_sz = rmem->size;
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WARN_ON(!(fqd_a && fqd_sz));
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-
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return 0;
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}
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RESERVEDMEM_OF_DECLARE(qman_fqd, "fsl,qman-fqd", qman_fqd);
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@@ -431,32 +452,13 @@ static int qman_pfdr(struct reserved_mem *rmem)
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}
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RESERVEDMEM_OF_DECLARE(qman_pfdr, "fsl,qman-pfdr", qman_pfdr);
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+#endif
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+
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static unsigned int qm_get_fqid_maxcnt(void)
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{
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return fqd_sz / 64;
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}
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-/*
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- * Flush this memory range from data cache so that QMAN originated
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- * transactions for this memory region could be marked non-coherent.
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- */
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-static int zero_priv_mem(struct device *dev, struct device_node *node,
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- phys_addr_t addr, size_t sz)
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-{
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- /* map as cacheable, non-guarded */
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- void __iomem *tmpp = ioremap_prot(addr, sz, 0);
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-
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- if (!tmpp)
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- return -ENOMEM;
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-
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- memset_io(tmpp, 0, sz);
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- flush_dcache_range((unsigned long)tmpp,
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- (unsigned long)tmpp + sz);
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- iounmap(tmpp);
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-
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- return 0;
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-}
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-
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static void log_edata_bits(struct device *dev, u32 bit_count)
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{
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u32 i, j, mask = 0xffffffff;
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@@ -727,10 +729,41 @@ static int fsl_qman_probe(struct platform_device *pdev)
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qm_channel_caam = QMAN_CHANNEL_CAAM_REV3;
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}
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- ret = zero_priv_mem(dev, node, fqd_a, fqd_sz);
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- WARN_ON(ret);
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- if (ret)
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- return -ENODEV;
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+ if (fqd_a) {
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+#ifdef CONFIG_PPC
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+ /*
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+ * For PPC backward DT compatibility
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+ * FQD memory MUST be zero'd by software
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+ */
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+ zero_priv_mem(fqd_a, fqd_sz);
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+#else
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+ WARN(1, "Unexpected architecture using non shared-dma-mem reservations");
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+#endif
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+ } else {
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+ /*
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+ * Order of memory regions is assumed as FQD followed by PFDR
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+ * in order to ensure allocations from the correct regions the
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+ * driver initializes then allocates each piece in order
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+ */
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+ ret = qbman_init_private_mem(dev, 0, &fqd_a, &fqd_sz);
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+ if (ret) {
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+ dev_err(dev, "qbman_init_private_mem() for FQD failed 0x%x\n",
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+ ret);
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+ return -ENODEV;
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+ }
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+ }
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+ dev_dbg(dev, "Allocated FQD 0x%llx 0x%zx\n", fqd_a, fqd_sz);
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+
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+ if (!pfdr_a) {
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+ /* Setup PFDR memory */
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+ ret = qbman_init_private_mem(dev, 1, &pfdr_a, &pfdr_sz);
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+ if (ret) {
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+ dev_err(dev, "qbman_init_private_mem() for PFDR failed 0x%x\n",
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+ ret);
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+ return -ENODEV;
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+ }
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+ }
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+ dev_dbg(dev, "Allocated PFDR 0x%llx 0x%zx\n", pfdr_a, pfdr_sz);
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ret = qman_init_ccsr(dev);
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if (ret) {
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