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@@ -985,6 +985,66 @@
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dma-names = "audio_tx";
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};
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};
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+
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+ abb_mpu: regulator-abb-mpu {
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+ compatible = "ti,abb-v2";
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+ regulator-name = "abb_mpu";
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+ #address-cells = <0>;
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+ #size-cells = <0>;
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+ clocks = <&sys_clkin>;
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+ ti,settling-time = <50>;
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+ ti,clock-cycles = <16>;
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+
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+ reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,
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+ <0x4a0021c4 0x8>, <0x4ae0c318 0x4>;
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+ reg-names = "base-address", "int-address",
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+ "efuse-address", "ldo-address";
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+ ti,tranxdone-status-mask = <0x80>;
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+ /* LDOVBBMPU_MUX_CTRL */
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+ ti,ldovbb-override-mask = <0x400>;
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+ /* LDOVBBMPU_VSET_OUT */
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+ ti,ldovbb-vset-mask = <0x1F>;
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+
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+ /*
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+ * NOTE: only FBB mode used but actual vset will
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+ * determine final biasing
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+ */
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+ ti,abb_info = <
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+ /*uV ABB efuse rbb_m fbb_m vset_m*/
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+ 1060000 0 0x0 0 0x02000000 0x01F00000
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+ 1250000 0 0x4 0 0x02000000 0x01F00000
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+ >;
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+ };
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+
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+ abb_mm: regulator-abb-mm {
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+ compatible = "ti,abb-v2";
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+ regulator-name = "abb_mm";
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+ #address-cells = <0>;
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+ #size-cells = <0>;
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+ clocks = <&sys_clkin>;
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+ ti,settling-time = <50>;
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+ ti,clock-cycles = <16>;
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+
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+ reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
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+ <0x4a0021a4 0x8>, <0x4ae0c314 0x4>;
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+ reg-names = "base-address", "int-address",
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+ "efuse-address", "ldo-address";
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+ ti,tranxdone-status-mask = <0x80000000>;
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+ /* LDOVBBMM_MUX_CTRL */
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+ ti,ldovbb-override-mask = <0x400>;
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+ /* LDOVBBMM_VSET_OUT */
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+ ti,ldovbb-vset-mask = <0x1F>;
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+
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+ /*
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+ * NOTE: only FBB mode used but actual vset will
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+ * determine final biasing
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+ */
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+ ti,abb_info = <
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+ /*uV ABB efuse rbb_m fbb_m vset_m*/
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+ 1025000 0 0x0 0 0x02000000 0x01F00000
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+ 1120000 0 0x4 0 0x02000000 0x01F00000
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+ >;
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+ };
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};
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};
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