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@@ -23,6 +23,7 @@
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#include <linux/mfd/samsung/core.h>
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#include <linux/mfd/samsung/s5m8767.h>
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#include <linux/regulator/of_regulator.h>
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+#include <linux/regmap.h>
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#define S5M8767_OPMODE_NORMAL_MODE 0x1
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@@ -120,8 +121,8 @@ static const struct sec_voltage_desc *reg_voltage_map[] = {
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[S5M8767_BUCK4] = &buck_voltage_val2,
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[S5M8767_BUCK5] = &buck_voltage_val1,
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[S5M8767_BUCK6] = &buck_voltage_val1,
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- [S5M8767_BUCK7] = NULL,
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- [S5M8767_BUCK8] = NULL,
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+ [S5M8767_BUCK7] = &buck_voltage_val3,
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+ [S5M8767_BUCK8] = &buck_voltage_val3,
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[S5M8767_BUCK9] = &buck_voltage_val3,
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};
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@@ -217,7 +218,7 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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- int mask = 0xc0, enable_ctrl;
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+ int enable_ctrl;
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unsigned int val;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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@@ -226,37 +227,38 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
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else if (ret)
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return ret;
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- ret = sec_reg_read(s5m8767->iodev, reg, &val);
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+ ret = regmap_read(s5m8767->iodev->regmap_pmic, reg, &val);
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if (ret)
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return ret;
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- return (val & mask) == enable_ctrl;
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+ return (val & S5M8767_ENCTRL_MASK) == enable_ctrl;
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}
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static int s5m8767_reg_enable(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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- int mask = 0xc0, enable_ctrl;
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+ int enable_ctrl;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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if (ret)
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return ret;
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- return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
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+ return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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+ S5M8767_ENCTRL_MASK, enable_ctrl);
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}
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static int s5m8767_reg_disable(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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- int ret, reg;
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- int mask = 0xc0, enable_ctrl;
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+ int ret, reg, enable_ctrl;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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if (ret)
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return ret;
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- return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
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+ return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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+ S5M8767_ENCTRL_MASK, ~S5M8767_ENCTRL_MASK);
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}
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static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
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@@ -417,9 +419,12 @@ static struct regulator_ops s5m8767_ops = {
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};
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static struct regulator_ops s5m8767_buck78_ops = {
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+ .list_voltage = regulator_list_voltage_linear,
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.is_enabled = s5m8767_reg_is_enabled,
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.enable = s5m8767_reg_enable,
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.disable = s5m8767_reg_disable,
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+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
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+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
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};
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#define s5m8767_regulator_desc(_name) { \
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@@ -745,17 +750,20 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck2_init);
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
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+ regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
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+ buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck3_init);
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
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+ regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
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+ buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck4_init);
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
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+ regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
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+ buck_init);
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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@@ -837,71 +845,76 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
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pdata->buck4_gpiodvs) {
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
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- (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
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- 1 << 1);
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
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- (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
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- 1 << 1);
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
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- (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
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- 1 << 1);
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK2CTRL, 1 << 1,
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+ (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK3CTRL, 1 << 1,
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+ (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK4CTRL, 1 << 1,
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+ (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
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}
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/* Initialize GPIO DVS registers */
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
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- s5m8767->buck2_vol[i]);
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+ regmap_write(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK2DVS1 + i,
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+ s5m8767->buck2_vol[i]);
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}
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if (s5m8767->buck3_gpiodvs) {
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
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- s5m8767->buck3_vol[i]);
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+ regmap_write(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK3DVS1 + i,
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+ s5m8767->buck3_vol[i]);
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}
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if (s5m8767->buck4_gpiodvs) {
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- sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
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- s5m8767->buck4_vol[i]);
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+ regmap_write(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_BUCK4DVS1 + i,
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+ s5m8767->buck4_vol[i]);
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}
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}
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if (s5m8767->buck2_ramp)
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_DVSRAMP, 0x08, 0x08);
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if (s5m8767->buck3_ramp)
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_DVSRAMP, 0x04, 0x04);
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if (s5m8767->buck4_ramp)
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_DVSRAMP, 0x02, 0x02);
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if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
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|| s5m8767->buck4_ramp) {
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+ unsigned int val;
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switch (s5m8767->ramp_delay) {
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case 5:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0x40, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_5;
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break;
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case 10:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0x90, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_10;
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break;
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case 25:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0xd0, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_25;
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break;
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case 50:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0xe0, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_50;
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break;
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case 100:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0xf0, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_100;
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break;
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default:
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- sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
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- 0x90, 0xf0);
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+ val = S5M8767_DVS_BUCK_RAMP_10;
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}
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+ regmap_update_bits(s5m8767->iodev->regmap_pmic,
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+ S5M8767_REG_DVSRAMP,
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+ S5M8767_DVS_BUCK_RAMP_MASK,
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+ val << S5M8767_DVS_BUCK_RAMP_SHIFT);
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}
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for (i = 0; i < pdata->num_regulators; i++) {
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