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@@ -5947,57 +5947,46 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val)
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int vlv_gpu_freq(int ddr_freq, int val)
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{
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- int mult, base;
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+ int div;
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+ /* 4 x czclk */
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switch (ddr_freq) {
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case 800:
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- mult = 20;
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- base = 120;
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+ div = 10;
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break;
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case 1066:
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- mult = 22;
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- base = 133;
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+ div = 12;
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break;
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case 1333:
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- mult = 21;
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- base = 125;
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+ div = 16;
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break;
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default:
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return -1;
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}
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- return ((val - 0xbd) * mult) + base;
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+ return DIV_ROUND_CLOSEST(ddr_freq * (val + 6 - 0xbd), 4 * div);
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}
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int vlv_freq_opcode(int ddr_freq, int val)
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{
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- int mult, base;
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+ int mul;
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+ /* 4 x czclk */
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switch (ddr_freq) {
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case 800:
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- mult = 20;
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- base = 120;
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+ mul = 10;
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break;
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case 1066:
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- mult = 22;
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- base = 133;
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+ mul = 12;
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break;
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case 1333:
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- mult = 21;
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- base = 125;
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+ mul = 16;
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break;
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default:
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return -1;
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}
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- val /= mult;
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- val -= base / mult;
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- val += 0xbd;
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-
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- if (val > 0xea)
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- val = 0xea;
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-
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- return val;
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+ return DIV_ROUND_CLOSEST(4 * mul * val, ddr_freq) + 0xbd - 6;
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}
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void intel_pm_init(struct drm_device *dev)
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