|
@@ -204,6 +204,22 @@ static const struct clk_corediv_soc_desc armada370_corediv_soc = {
|
|
|
.ratio_offset = 0x8,
|
|
|
};
|
|
|
|
|
|
+static const struct clk_corediv_soc_desc armada380_corediv_soc = {
|
|
|
+ .descs = mvebu_corediv_desc,
|
|
|
+ .ndescs = ARRAY_SIZE(mvebu_corediv_desc),
|
|
|
+ .ops = {
|
|
|
+ .enable = clk_corediv_enable,
|
|
|
+ .disable = clk_corediv_disable,
|
|
|
+ .is_enabled = clk_corediv_is_enabled,
|
|
|
+ .recalc_rate = clk_corediv_recalc_rate,
|
|
|
+ .round_rate = clk_corediv_round_rate,
|
|
|
+ .set_rate = clk_corediv_set_rate,
|
|
|
+ },
|
|
|
+ .ratio_reload = BIT(8),
|
|
|
+ .enable_bit_offset = 16,
|
|
|
+ .ratio_offset = 0x4,
|
|
|
+};
|
|
|
+
|
|
|
static const struct clk_corediv_soc_desc armada375_corediv_soc = {
|
|
|
.descs = mvebu_corediv_desc,
|
|
|
.ndescs = ARRAY_SIZE(mvebu_corediv_desc),
|
|
@@ -213,7 +229,7 @@ static const struct clk_corediv_soc_desc armada375_corediv_soc = {
|
|
|
.set_rate = clk_corediv_set_rate,
|
|
|
},
|
|
|
.ratio_reload = BIT(8),
|
|
|
- .ratio_offset = 0x8,
|
|
|
+ .ratio_offset = 0x4,
|
|
|
};
|
|
|
|
|
|
static void __init
|
|
@@ -290,3 +306,10 @@ static void __init armada375_corediv_clk_init(struct device_node *node)
|
|
|
}
|
|
|
CLK_OF_DECLARE(armada375_corediv_clk, "marvell,armada-375-corediv-clock",
|
|
|
armada375_corediv_clk_init);
|
|
|
+
|
|
|
+static void __init armada380_corediv_clk_init(struct device_node *node)
|
|
|
+{
|
|
|
+ return mvebu_corediv_clk_init(node, &armada380_corediv_soc);
|
|
|
+}
|
|
|
+CLK_OF_DECLARE(armada380_corediv_clk, "marvell,armada-380-corediv-clock",
|
|
|
+ armada380_corediv_clk_init);
|