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@@ -3436,7 +3436,7 @@ static u32 gfx_v7_0_halt_rlc(struct amdgpu_device *adev)
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return orig;
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}
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-void gfx_v7_0_enter_rlc_safe_mode(struct amdgpu_device *adev)
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+static void gfx_v7_0_enter_rlc_safe_mode(struct amdgpu_device *adev)
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{
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u32 tmp, i, mask;
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@@ -3458,7 +3458,7 @@ void gfx_v7_0_enter_rlc_safe_mode(struct amdgpu_device *adev)
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}
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}
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-void gfx_v7_0_exit_rlc_safe_mode(struct amdgpu_device *adev)
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+static void gfx_v7_0_exit_rlc_safe_mode(struct amdgpu_device *adev)
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{
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u32 tmp;
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@@ -4204,6 +4204,11 @@ static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {
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.select_se_sh = &gfx_v7_0_select_se_sh,
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};
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+static const struct amdgpu_rlc_funcs gfx_v7_0_rlc_funcs = {
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+ .enter_safe_mode = gfx_v7_0_enter_rlc_safe_mode,
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+ .exit_safe_mode = gfx_v7_0_exit_rlc_safe_mode
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+};
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+
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static int gfx_v7_0_early_init(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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@@ -4211,6 +4216,7 @@ static int gfx_v7_0_early_init(void *handle)
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adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS;
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adev->gfx.num_compute_rings = GFX7_NUM_COMPUTE_RINGS;
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adev->gfx.funcs = &gfx_v7_0_gfx_funcs;
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+ adev->gfx.rlc.funcs = &gfx_v7_0_rlc_funcs;
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gfx_v7_0_set_ring_funcs(adev);
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gfx_v7_0_set_irq_funcs(adev);
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gfx_v7_0_set_gds_init(adev);
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