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@@ -7,6 +7,54 @@
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#include <asm/processor.h>
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#include <asm/special_insns.h>
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+static inline void __invpcid(unsigned long pcid, unsigned long addr,
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+ unsigned long type)
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+{
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+ u64 desc[2] = { pcid, addr };
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+
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+ /*
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+ * The memory clobber is because the whole point is to invalidate
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+ * stale TLB entries and, especially if we're flushing global
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+ * mappings, we don't want the compiler to reorder any subsequent
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+ * memory accesses before the TLB flush.
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+ *
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+ * The hex opcode is invpcid (%ecx), %eax in 32-bit mode and
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+ * invpcid (%rcx), %rax in long mode.
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+ */
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+ asm volatile (".byte 0x66, 0x0f, 0x38, 0x82, 0x01"
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+ : : "m" (desc), "a" (type), "c" (desc) : "memory");
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+}
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+
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+#define INVPCID_TYPE_INDIV_ADDR 0
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+#define INVPCID_TYPE_SINGLE_CTXT 1
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+#define INVPCID_TYPE_ALL_INCL_GLOBAL 2
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+#define INVPCID_TYPE_ALL_NON_GLOBAL 3
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+
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+/* Flush all mappings for a given pcid and addr, not including globals. */
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+static inline void invpcid_flush_one(unsigned long pcid,
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+ unsigned long addr)
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+{
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+ __invpcid(pcid, addr, INVPCID_TYPE_INDIV_ADDR);
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+}
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+
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+/* Flush all mappings for a given PCID, not including globals. */
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+static inline void invpcid_flush_single_context(unsigned long pcid)
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+{
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+ __invpcid(pcid, 0, INVPCID_TYPE_SINGLE_CTXT);
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+}
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+
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+/* Flush all mappings, including globals, for all PCIDs. */
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+static inline void invpcid_flush_all(void)
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+{
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+ __invpcid(0, 0, INVPCID_TYPE_ALL_INCL_GLOBAL);
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+}
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+
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+/* Flush all mappings for all PCIDs except globals. */
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+static inline void invpcid_flush_all_nonglobals(void)
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+{
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+ __invpcid(0, 0, INVPCID_TYPE_ALL_NON_GLOBAL);
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+}
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+
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#ifdef CONFIG_PARAVIRT
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#include <asm/paravirt.h>
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#else
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