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@@ -876,6 +876,27 @@ static void vi_invalidate_hdp(struct amdgpu_device *adev,
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}
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}
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+static bool vi_need_full_reset(struct amdgpu_device *adev)
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+{
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+ switch (adev->asic_type) {
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+ case CHIP_CARRIZO:
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+ case CHIP_STONEY:
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+ /* CZ has hang issues with full reset at the moment */
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+ return false;
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+ case CHIP_FIJI:
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+ case CHIP_TONGA:
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+ /* XXX: soft reset should work on fiji and tonga */
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+ return true;
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+ case CHIP_POLARIS10:
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+ case CHIP_POLARIS11:
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+ case CHIP_POLARIS12:
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+ case CHIP_TOPAZ:
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+ default:
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+ /* change this when we support soft reset */
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+ return true;
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+ }
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+}
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+
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static const struct amdgpu_asic_funcs vi_asic_funcs =
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{
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.read_disabled_bios = &vi_read_disabled_bios,
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@@ -889,6 +910,7 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
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.get_config_memsize = &vi_get_config_memsize,
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.flush_hdp = &vi_flush_hdp,
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.invalidate_hdp = &vi_invalidate_hdp,
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+ .need_full_reset = &vi_need_full_reset,
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};
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#define CZ_REV_BRISTOL(rev) \
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