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@@ -438,39 +438,17 @@
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#define MODE0_GATE_M2XCLK_168MHZ 1
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#define MODE0_GATE_M2XCLK_112MHZ 2
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#define MODE0_GATE_M2XCLK_84MHZ 3
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-#define MODE0_GATE_VGA 10:10
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-#define MODE0_GATE_VGA_OFF 0
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-#define MODE0_GATE_VGA_ON 1
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-#define MODE0_GATE_PWM 9:9
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-#define MODE0_GATE_PWM_OFF 0
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-#define MODE0_GATE_PWM_ON 1
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-#define MODE0_GATE_I2C 8:8
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-#define MODE0_GATE_I2C_OFF 0
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-#define MODE0_GATE_I2C_ON 1
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-#define MODE0_GATE_SSP 7:7
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-#define MODE0_GATE_SSP_OFF 0
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-#define MODE0_GATE_SSP_ON 1
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-#define MODE0_GATE_GPIO 6:6
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-#define MODE0_GATE_GPIO_OFF 0
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-#define MODE0_GATE_GPIO_ON 1
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-#define MODE0_GATE_ZVPORT 5:5
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-#define MODE0_GATE_ZVPORT_OFF 0
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-#define MODE0_GATE_ZVPORT_ON 1
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-#define MODE0_GATE_CSC 4:4
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-#define MODE0_GATE_CSC_OFF 0
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-#define MODE0_GATE_CSC_ON 1
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-#define MODE0_GATE_DE 3:3
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-#define MODE0_GATE_DE_OFF 0
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-#define MODE0_GATE_DE_ON 1
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-#define MODE0_GATE_DISPLAY 2:2
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-#define MODE0_GATE_DISPLAY_OFF 0
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-#define MODE0_GATE_DISPLAY_ON 1
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-#define MODE0_GATE_LOCALMEM 1:1
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-#define MODE0_GATE_LOCALMEM_OFF 0
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-#define MODE0_GATE_LOCALMEM_ON 1
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-#define MODE0_GATE_DMA 0:0
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-#define MODE0_GATE_DMA_OFF 0
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-#define MODE0_GATE_DMA_ON 1
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+#define MODE0_GATE_VGA BIT(10)
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+#define MODE0_GATE_PWM BIT(9)
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+#define MODE0_GATE_I2C BIT(8)
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+#define MODE0_GATE_SSP BIT(7)
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+#define MODE0_GATE_GPIO BIT(6)
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+#define MODE0_GATE_ZVPORT BIT(5)
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+#define MODE0_GATE_CSC BIT(4)
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+#define MODE0_GATE_DE BIT(3)
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+#define MODE0_GATE_DISPLAY BIT(2)
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+#define MODE0_GATE_LOCALMEM BIT(1)
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+#define MODE0_GATE_DMA BIT(0)
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#define MODE1_GATE 0x000048
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#define MODE1_GATE_MCLK 15:14
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