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@@ -0,0 +1,72 @@
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+#ifndef _ASM_X86_INTEL_RDT_SCHED_H
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+#define _ASM_X86_INTEL_RDT_SCHED_H
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+
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+#ifdef CONFIG_INTEL_RDT
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+
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+#include <linux/sched.h>
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+#include <linux/jump_label.h>
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+
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+#define IA32_PQR_ASSOC 0x0c8f
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+
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+/**
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+ * struct intel_pqr_state - State cache for the PQR MSR
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+ * @rmid: The cached Resource Monitoring ID
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+ * @closid: The cached Class Of Service ID
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+ *
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+ * The upper 32 bits of IA32_PQR_ASSOC contain closid and the
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+ * lower 10 bits rmid. The update to IA32_PQR_ASSOC always
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+ * contains both parts, so we need to cache them.
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+ *
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+ * The cache also helps to avoid pointless updates if the value does
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+ * not change.
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+ */
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+struct intel_pqr_state {
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+ u32 rmid;
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+ u32 closid;
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+};
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+
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+DECLARE_PER_CPU(struct intel_pqr_state, pqr_state);
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+DECLARE_PER_CPU_READ_MOSTLY(int, cpu_closid);
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+DECLARE_STATIC_KEY_FALSE(rdt_enable_key);
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+
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+/*
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+ * intel_rdt_sched_in() - Writes the task's CLOSid to IA32_PQR_MSR
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+ *
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+ * Following considerations are made so that this has minimal impact
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+ * on scheduler hot path:
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+ * - This will stay as no-op unless we are running on an Intel SKU
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+ * which supports resource control and we enable by mounting the
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+ * resctrl file system.
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+ * - Caches the per cpu CLOSid values and does the MSR write only
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+ * when a task with a different CLOSid is scheduled in.
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+ *
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+ * Must be called with preemption disabled.
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+ */
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+static inline void intel_rdt_sched_in(void)
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+{
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+ if (static_branch_likely(&rdt_enable_key)) {
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+ struct intel_pqr_state *state = this_cpu_ptr(&pqr_state);
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+ int closid;
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+
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+ /*
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+ * If this task has a closid assigned, use it.
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+ * Else use the closid assigned to this cpu.
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+ */
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+ closid = current->closid;
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+ if (closid == 0)
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+ closid = this_cpu_read(cpu_closid);
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+
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+ if (closid != state->closid) {
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+ state->closid = closid;
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+ wrmsr(IA32_PQR_ASSOC, state->rmid, closid);
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+ }
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+ }
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+}
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+
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+#else
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+
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+static inline void intel_rdt_sched_in(void) {}
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+
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+#endif /* CONFIG_INTEL_RDT */
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+
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+#endif /* _ASM_X86_INTEL_RDT_SCHED_H */
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