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@@ -17,6 +17,8 @@
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#include "bcma_private.h"
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+#define BCMA_GPIO_MAX_PINS 32
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+
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static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip)
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{
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return container_of(chip, struct bcma_drv_cc, gpio);
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@@ -204,6 +206,7 @@ static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
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int bcma_gpio_init(struct bcma_drv_cc *cc)
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{
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+ struct bcma_bus *bus = cc->core->bus;
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struct gpio_chip *chip = &cc->gpio;
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int err;
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@@ -222,7 +225,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
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if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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chip->of_node = cc->core->dev.of_node;
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#endif
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- switch (cc->core->bus->chipinfo.id) {
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+ switch (bus->chipinfo.id) {
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case BCMA_CHIP_ID_BCM5357:
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case BCMA_CHIP_ID_BCM53572:
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chip->ngpio = 32;
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@@ -231,13 +234,17 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
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chip->ngpio = 16;
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}
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- /* There is just one SoC in one device and its GPIO addresses should be
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- * deterministic to address them more easily. The other buses could get
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- * a random base number. */
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- if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
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- chip->base = 0;
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- else
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- chip->base = -1;
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+ /*
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+ * On MIPS we register GPIO devices (LEDs, buttons) using absolute GPIO
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+ * pin numbers. We don't have Device Tree there and we can't really use
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+ * relative (per chip) numbers.
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+ * So let's use predictable base for BCM47XX and "random" for all other.
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+ */
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+#if IS_BUILTIN(CONFIG_BCM47XX)
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+ chip->base = bus->num * BCMA_GPIO_MAX_PINS;
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+#else
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+ chip->base = -1;
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+#endif
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err = bcma_gpio_irq_domain_init(cc);
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if (err)
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