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@@ -51,6 +51,7 @@
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#define SHA_FLAGS_INIT BIT(4)
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#define SHA_FLAGS_CPU BIT(5)
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#define SHA_FLAGS_DMA_READY BIT(6)
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+#define SHA_FLAGS_DUMP_REG BIT(7)
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/* bits[11:8] are reserved. */
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@@ -167,14 +168,118 @@ static struct atmel_sha_drv atmel_sha = {
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.lock = __SPIN_LOCK_UNLOCKED(atmel_sha.lock),
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};
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+#ifdef VERBOSE_DEBUG
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+static const char *atmel_sha_reg_name(u32 offset, char *tmp, size_t sz, bool wr)
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+{
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+ switch (offset) {
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+ case SHA_CR:
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+ return "CR";
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+
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+ case SHA_MR:
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+ return "MR";
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+
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+ case SHA_IER:
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+ return "IER";
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+
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+ case SHA_IDR:
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+ return "IDR";
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+
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+ case SHA_IMR:
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+ return "IMR";
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+
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+ case SHA_ISR:
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+ return "ISR";
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+
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+ case SHA_MSR:
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+ return "MSR";
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+
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+ case SHA_BCR:
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+ return "BCR";
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+
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+ case SHA_REG_DIN(0):
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+ case SHA_REG_DIN(1):
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+ case SHA_REG_DIN(2):
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+ case SHA_REG_DIN(3):
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+ case SHA_REG_DIN(4):
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+ case SHA_REG_DIN(5):
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+ case SHA_REG_DIN(6):
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+ case SHA_REG_DIN(7):
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+ case SHA_REG_DIN(8):
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+ case SHA_REG_DIN(9):
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+ case SHA_REG_DIN(10):
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+ case SHA_REG_DIN(11):
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+ case SHA_REG_DIN(12):
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+ case SHA_REG_DIN(13):
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+ case SHA_REG_DIN(14):
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+ case SHA_REG_DIN(15):
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+ snprintf(tmp, sz, "IDATAR[%u]", (offset - SHA_REG_DIN(0)) >> 2);
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+ break;
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+
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+ case SHA_REG_DIGEST(0):
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+ case SHA_REG_DIGEST(1):
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+ case SHA_REG_DIGEST(2):
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+ case SHA_REG_DIGEST(3):
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+ case SHA_REG_DIGEST(4):
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+ case SHA_REG_DIGEST(5):
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+ case SHA_REG_DIGEST(6):
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+ case SHA_REG_DIGEST(7):
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+ case SHA_REG_DIGEST(8):
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+ case SHA_REG_DIGEST(9):
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+ case SHA_REG_DIGEST(10):
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+ case SHA_REG_DIGEST(11):
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+ case SHA_REG_DIGEST(12):
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+ case SHA_REG_DIGEST(13):
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+ case SHA_REG_DIGEST(14):
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+ case SHA_REG_DIGEST(15):
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+ if (wr)
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+ snprintf(tmp, sz, "IDATAR[%u]",
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+ 16u + ((offset - SHA_REG_DIGEST(0)) >> 2));
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+ else
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+ snprintf(tmp, sz, "ODATAR[%u]",
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+ (offset - SHA_REG_DIGEST(0)) >> 2);
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+ break;
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+
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+ case SHA_HW_VERSION:
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+ return "HWVER";
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+
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+ default:
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+ snprintf(tmp, sz, "0x%02x", offset);
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+ break;
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+ }
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+
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+ return tmp;
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+}
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+
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+#endif /* VERBOSE_DEBUG */
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+
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static inline u32 atmel_sha_read(struct atmel_sha_dev *dd, u32 offset)
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{
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- return readl_relaxed(dd->io_base + offset);
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+ u32 value = readl_relaxed(dd->io_base + offset);
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+
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+#ifdef VERBOSE_DEBUG
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+ if (dd->flags & SHA_FLAGS_DUMP_REG) {
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+ char tmp[16];
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+
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+ dev_vdbg(dd->dev, "read 0x%08x from %s\n", value,
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+ atmel_sha_reg_name(offset, tmp, sizeof(tmp), false));
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+ }
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+#endif /* VERBOSE_DEBUG */
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+
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+ return value;
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}
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static inline void atmel_sha_write(struct atmel_sha_dev *dd,
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u32 offset, u32 value)
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{
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+#ifdef VERBOSE_DEBUG
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+ if (dd->flags & SHA_FLAGS_DUMP_REG) {
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+ char tmp[16];
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+
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+ dev_vdbg(dd->dev, "write 0x%08x into %s\n", value,
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+ atmel_sha_reg_name(offset, tmp, sizeof(tmp), true));
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+ }
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+#endif /* VERBOSE_DEBUG */
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+
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writel_relaxed(value, dd->io_base + offset);
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}
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@@ -183,7 +288,8 @@ static inline int atmel_sha_complete(struct atmel_sha_dev *dd, int err)
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struct ahash_request *req = dd->req;
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dd->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL | SHA_FLAGS_CPU |
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- SHA_FLAGS_DMA_READY | SHA_FLAGS_OUTPUT_READY);
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+ SHA_FLAGS_DMA_READY | SHA_FLAGS_OUTPUT_READY |
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+ SHA_FLAGS_DUMP_REG);
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clk_disable(dd->iclk);
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