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@@ -154,10 +154,10 @@
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#define VI6_RPF_ALPH_SEL_AEXT_EXT (1 << 18)
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#define VI6_RPF_ALPH_SEL_AEXT_ONE (2 << 18)
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#define VI6_RPF_ALPH_SEL_AEXT_MASK (3 << 18)
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-#define VI6_RPF_ALPH_SEL_ALPHA0_MASK (0xff << 8)
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-#define VI6_RPF_ALPH_SEL_ALPHA0_SHIFT 8
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-#define VI6_RPF_ALPH_SEL_ALPHA1_MASK (0xff << 0)
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-#define VI6_RPF_ALPH_SEL_ALPHA1_SHIFT 0
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+#define VI6_RPF_ALPH_SEL_ALPHA1_MASK (0xff << 8)
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+#define VI6_RPF_ALPH_SEL_ALPHA1_SHIFT 8
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+#define VI6_RPF_ALPH_SEL_ALPHA0_MASK (0xff << 0)
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+#define VI6_RPF_ALPH_SEL_ALPHA0_SHIFT 0
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#define VI6_RPF_VRTCOL_SET 0x0318
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#define VI6_RPF_VRTCOL_SET_LAYA_MASK (0xff << 24)
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