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@@ -228,6 +228,24 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
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if (!(reg16 & PCI_EXP_LNKSTA_SLC))
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same_clock = 0;
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+ /* Port might be already in common clock mode */
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+ pcie_capability_read_word(parent, PCI_EXP_LNKCTL, ®16);
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+ if (same_clock && (reg16 & PCI_EXP_LNKCTL_CCC)) {
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+ bool consistent = true;
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+
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+ list_for_each_entry(child, &linkbus->devices, bus_list) {
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+ pcie_capability_read_word(child, PCI_EXP_LNKCTL,
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+ ®16);
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+ if (!(reg16 & PCI_EXP_LNKCTL_CCC)) {
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+ consistent = false;
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+ break;
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+ }
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+ }
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+ if (consistent)
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+ return;
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+ pci_warn(parent, "ASPM: current common clock configuration is broken, reconfiguring\n");
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+ }
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+
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/* Configure downstream component, all functions */
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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pcie_capability_read_word(child, PCI_EXP_LNKCTL, ®16);
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