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@@ -101,6 +101,17 @@ struct sun6i_dma_config {
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u32 nr_max_channels;
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u32 nr_max_requests;
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u32 nr_max_vchans;
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+ /*
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+ * In the datasheets/user manuals of newer Allwinner SoCs, a special
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+ * bit (bit 2 at register 0x20) is present.
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+ * It's named "DMA MCLK interface circuit auto gating bit" in the
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+ * documents, and the footnote of this register says that this bit
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+ * should be set up when initializing the DMA controller.
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+ * Allwinner A23/A33 user manuals do not have this bit documented,
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+ * however these SoCs really have and need this bit, as seen in the
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+ * BSP kernel source code.
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+ */
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+ bool gate_needed;
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};
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/*
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@@ -1009,6 +1020,7 @@ static struct sun6i_dma_config sun8i_a23_dma_cfg = {
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.nr_max_channels = 8,
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.nr_max_requests = 24,
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.nr_max_vchans = 37,
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+ .gate_needed = true,
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};
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static struct sun6i_dma_config sun8i_a83t_dma_cfg = {
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@@ -1174,13 +1186,7 @@ static int sun6i_dma_probe(struct platform_device *pdev)
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goto err_dma_unregister;
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}
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- /*
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- * sun8i variant requires us to toggle a dma gating register,
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- * as seen in Allwinner's SDK. This register is not documented
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- * in the A23 user manual.
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- */
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- if (of_device_is_compatible(pdev->dev.of_node,
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- "allwinner,sun8i-a23-dma"))
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+ if (sdc->cfg->gate_needed)
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writel(SUN8I_DMA_GATE_ENABLE, sdc->base + SUN8I_DMA_GATE);
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return 0;
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