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@@ -557,6 +557,22 @@ static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
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return true;
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}
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+static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
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+ int link_rate,
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+ uint8_t lane_count)
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+{
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+ const struct drm_display_mode *fixed_mode =
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+ intel_dp->attached_connector->panel.fixed_mode;
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+ int mode_rate, max_rate;
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+
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+ mode_rate = intel_dp_link_required(fixed_mode->clock, 18);
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+ max_rate = intel_dp_max_data_rate(link_rate, lane_count);
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+ if (mode_rate > max_rate)
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+ return false;
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+
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+ return true;
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+}
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+
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int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
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int link_rate, uint8_t lane_count)
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{
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@@ -566,9 +582,23 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
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intel_dp->num_common_rates,
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link_rate);
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if (index > 0) {
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+ if (intel_dp_is_edp(intel_dp) &&
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+ !intel_dp_can_link_train_fallback_for_edp(intel_dp,
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+ intel_dp->common_rates[index - 1],
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+ lane_count)) {
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+ DRM_DEBUG_KMS("Retrying Link training for eDP with same parameters\n");
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+ return 0;
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+ }
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intel_dp->max_link_rate = intel_dp->common_rates[index - 1];
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intel_dp->max_link_lane_count = lane_count;
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} else if (lane_count > 1) {
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+ if (intel_dp_is_edp(intel_dp) &&
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+ !intel_dp_can_link_train_fallback_for_edp(intel_dp,
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+ intel_dp_max_common_rate(intel_dp),
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+ lane_count >> 1)) {
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+ DRM_DEBUG_KMS("Retrying Link training for eDP with same parameters\n");
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+ return 0;
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+ }
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intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp);
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intel_dp->max_link_lane_count = lane_count >> 1;
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} else {
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