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+/*
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+ * Rockchip eFuse Driver
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+ *
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+ * Copyright (c) 2015 Rockchip Electronics Co. Ltd.
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+ * Author: Caesar Wang <wxt@rock-chips.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of version 2 of the GNU General Public License as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful, but WITHOUT
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+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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+ * more details.
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+ */
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+
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+#include <linux/platform_device.h>
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+#include <linux/nvmem-provider.h>
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+#include <linux/slab.h>
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+#include <linux/regmap.h>
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+#include <linux/device.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/delay.h>
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+#include <linux/of.h>
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+#include <linux/clk.h>
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+
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+#define EFUSE_A_SHIFT 6
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+#define EFUSE_A_MASK 0x3ff
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+#define EFUSE_PGENB BIT(3)
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+#define EFUSE_LOAD BIT(2)
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+#define EFUSE_STROBE BIT(1)
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+#define EFUSE_CSB BIT(0)
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+
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+#define REG_EFUSE_CTRL 0x0000
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+#define REG_EFUSE_DOUT 0x0004
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+
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+struct rockchip_efuse_context {
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+ struct device *dev;
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+ void __iomem *base;
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+ struct clk *efuse_clk;
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+};
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+
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+static int rockchip_efuse_write(void *context, const void *data, size_t count)
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+{
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+ /* Nothing TBD, Read-Only */
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+ return 0;
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+}
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+
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+static int rockchip_efuse_read(void *context,
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+ const void *reg, size_t reg_size,
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+ void *val, size_t val_size)
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+{
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+ unsigned int offset = *(u32 *)reg;
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+ struct rockchip_efuse_context *_context = context;
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+ void __iomem *base = _context->base;
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+ struct clk *clk = _context->efuse_clk;
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+ u8 *buf = val;
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+ int ret;
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+
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+ ret = clk_prepare_enable(clk);
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+ if (ret < 0) {
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+ dev_err(_context->dev, "failed to prepare/enable efuse clk\n");
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+ return ret;
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+ }
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+
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+ writel(EFUSE_LOAD | EFUSE_PGENB, base + REG_EFUSE_CTRL);
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+ udelay(1);
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+ while (val_size) {
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+ writel(readl(base + REG_EFUSE_CTRL) &
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+ (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
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+ base + REG_EFUSE_CTRL);
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+ writel(readl(base + REG_EFUSE_CTRL) |
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+ ((offset & EFUSE_A_MASK) << EFUSE_A_SHIFT),
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+ base + REG_EFUSE_CTRL);
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+ udelay(1);
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+ writel(readl(base + REG_EFUSE_CTRL) |
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+ EFUSE_STROBE, base + REG_EFUSE_CTRL);
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+ udelay(1);
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+ *buf++ = readb(base + REG_EFUSE_DOUT);
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+ writel(readl(base + REG_EFUSE_CTRL) &
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+ (~EFUSE_STROBE), base + REG_EFUSE_CTRL);
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+ udelay(1);
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+
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+ val_size -= 1;
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+ offset += 1;
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+ }
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+
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+ /* Switch to standby mode */
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+ writel(EFUSE_PGENB | EFUSE_CSB, base + REG_EFUSE_CTRL);
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+
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+ clk_disable_unprepare(clk);
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+
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+ return 0;
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+}
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+
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+static struct regmap_bus rockchip_efuse_bus = {
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+ .read = rockchip_efuse_read,
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+ .write = rockchip_efuse_write,
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+ .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
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+ .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
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+};
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+
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+struct regmap_config rockchip_efuse_regmap_config = {
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+ .reg_bits = 32,
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+ .reg_stride = 1,
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+ .val_bits = 8,
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+};
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+
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+static struct nvmem_config econfig = {
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+ .name = "rockchip-efuse",
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+ .owner = THIS_MODULE,
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+ .read_only = true,
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+};
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+
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+static const struct of_device_id rockchip_efuse_match[] = {
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+ { .compatible = "rockchip,rockchip-efuse",},
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+ { /* sentinel */},
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+};
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+MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
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+
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+int rockchip_efuse_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct resource *res;
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+ struct nvmem_device *nvmem;
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+ struct regmap *regmap;
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+ void __iomem *base;
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+ struct clk *clk;
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+ struct rockchip_efuse_context *context;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ base = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(base))
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+ return PTR_ERR(base);
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+
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+ context = devm_kzalloc(dev, sizeof(struct rockchip_efuse_context),
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+ GFP_KERNEL);
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+ if (IS_ERR(context))
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+ return PTR_ERR(context);
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+
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+ clk = devm_clk_get(dev, "pclk_efuse");
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+ if (IS_ERR(clk))
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+ return PTR_ERR(clk);
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+
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+ context->dev = dev;
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+ context->base = base;
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+ context->efuse_clk = clk;
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+
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+ rockchip_efuse_regmap_config.max_register = resource_size(res) - 1;
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+
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+ regmap = devm_regmap_init(dev, &rockchip_efuse_bus,
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+ context, &rockchip_efuse_regmap_config);
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+ if (IS_ERR(regmap)) {
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+ dev_err(dev, "regmap init failed\n");
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+ return PTR_ERR(regmap);
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+ }
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+ econfig.dev = dev;
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+ nvmem = nvmem_register(&econfig);
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+ if (IS_ERR(nvmem))
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+ return PTR_ERR(nvmem);
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+
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+ platform_set_drvdata(pdev, nvmem);
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+
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+ return 0;
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+}
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+
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+int rockchip_efuse_remove(struct platform_device *pdev)
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+{
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+ struct nvmem_device *nvmem = platform_get_drvdata(pdev);
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+
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+ return nvmem_unregister(nvmem);
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+}
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+
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+static struct platform_driver rockchip_efuse_driver = {
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+ .probe = rockchip_efuse_probe,
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+ .remove = rockchip_efuse_remove,
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+ .driver = {
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+ .name = "rockchip-efuse",
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+ .of_match_table = rockchip_efuse_match,
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+ },
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+};
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+
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+module_platform_driver(rockchip_efuse_driver);
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+MODULE_DESCRIPTION("rockchip_efuse driver");
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+MODULE_LICENSE("GPL v2");
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