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@@ -992,6 +992,18 @@ static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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return ret;
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}
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+static int smu10_set_watermarks_for_clocks_ranges(struct pp_hwmgr *hwmgr,
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+ struct pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges)
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+{
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+ struct smu10_hwmgr *data = hwmgr->backend;
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+ Watermarks_t *table = &(data->water_marks_table);
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+ int result = 0;
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+
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+ smu_set_watermarks_for_clocks_ranges(table,wm_with_clock_ranges);
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+ smum_smc_table_manager(hwmgr, (uint8_t *)table, (uint16_t)SMU10_WMTABLE, false);
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+ data->water_marks_exist = true;
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+ return result;
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+}
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static int smu10_set_mmhub_powergating_by_smu(struct pp_hwmgr *hwmgr)
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{
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return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_PowerGateMmHub);
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@@ -1021,6 +1033,7 @@ static const struct pp_hwmgr_func smu10_hwmgr_funcs = {
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.get_current_shallow_sleep_clocks = smu10_get_current_shallow_sleep_clocks,
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.get_clock_by_type_with_latency = smu10_get_clock_by_type_with_latency,
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.get_clock_by_type_with_voltage = smu10_get_clock_by_type_with_voltage,
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+ .set_watermarks_for_clocks_ranges = smu10_set_watermarks_for_clocks_ranges,
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.get_max_high_clocks = smu10_get_max_high_clocks,
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.read_sensor = smu10_read_sensor,
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.set_active_display_count = smu10_set_active_display_count,
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