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@@ -1305,7 +1305,8 @@ static int init_render_ring(struct intel_engine_cs *engine)
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if (IS_GEN(dev_priv, 6, 7))
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I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
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- I915_WRITE_IMR(engine, ~engine->irq_keep_mask);
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+ if (INTEL_INFO(dev_priv)->gen >= 6)
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+ I915_WRITE_IMR(engine, ~engine->irq_keep_mask);
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return init_workarounds_ring(engine);
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}
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