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@@ -25,6 +25,7 @@
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/* ADC configuration registers field define */
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#define ADC_AIEN (0x1 << 7)
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#define ADC_CONV_DISABLE 0x1F
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+#define ADC_AVGE (0x1 << 5)
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#define ADC_CAL (0x1 << 7)
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#define ADC_CALF 0x2
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#define ADC_12BIT_MODE (0x2 << 2)
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@@ -32,6 +33,7 @@
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#define ADC_CLK_DIV_8 (0x03 << 5)
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#define ADC_SHORT_SAMPLE_MODE (0x0 << 4)
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#define ADC_HARDWARE_TRIGGER (0x1 << 13)
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+#define ADC_AVGS_SHIFT 14
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#define SELECT_CHANNEL_4 0x04
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#define SELECT_CHANNEL_1 0x01
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#define DISABLE_CONVERSION_INT (0x0 << 7)
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@@ -86,6 +88,7 @@ struct imx6ul_tsc {
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int measure_delay_time;
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int pre_charge_time;
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+ int average_samples;
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struct completion completion;
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};
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@@ -107,6 +110,8 @@ static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
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adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
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adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK;
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adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE;
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+ if (tsc->average_samples)
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+ adc_cfg |= (tsc->average_samples - 1) << ADC_AVGS_SHIFT;
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adc_cfg &= ~ADC_HARDWARE_TRIGGER;
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writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG);
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@@ -118,6 +123,8 @@ static int imx6ul_adc_init(struct imx6ul_tsc *tsc)
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/* start ADC calibration */
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adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
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adc_gc |= ADC_CAL;
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+ if (tsc->average_samples)
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+ adc_gc |= ADC_AVGE;
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writel(adc_gc, tsc->adc_regs + REG_ADC_GC);
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timeout = wait_for_completion_timeout
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@@ -450,6 +457,17 @@ static int imx6ul_tsc_probe(struct platform_device *pdev)
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if (err)
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tsc->pre_charge_time = 0xfff;
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+ err = of_property_read_u32(np, "average-samples",
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+ &tsc->average_samples);
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+ if (err)
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+ tsc->average_samples = 0;
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+
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+ if (tsc->average_samples > 4) {
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+ dev_err(&pdev->dev, "average-samples (%u) must be [0-4]\n",
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+ tsc->average_samples);
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+ return -EINVAL;
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+ }
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+
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err = input_register_device(tsc->input);
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if (err) {
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dev_err(&pdev->dev,
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