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@@ -9,6 +9,7 @@
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* Zhang Yanmin (yanmin.zhang@intel.com)
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* Zhang Yanmin (yanmin.zhang@intel.com)
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*/
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*/
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+#include <linux/cper.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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#include <linux/pci-acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/sched.h>
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#include <linux/sched.h>
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@@ -20,6 +21,7 @@
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/kfifo.h>
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#include <linux/kfifo.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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+#include <ras/ras_event.h>
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#include "aerdrv.h"
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#include "aerdrv.h"
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#include "../../pci.h"
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#include "../../pci.h"
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@@ -112,6 +114,247 @@ int pci_aer_init(struct pci_dev *dev)
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return pci_cleanup_aer_error_status_regs(dev);
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return pci_cleanup_aer_error_status_regs(dev);
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}
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}
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+#define AER_AGENT_RECEIVER 0
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+#define AER_AGENT_REQUESTER 1
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+#define AER_AGENT_COMPLETER 2
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+#define AER_AGENT_TRANSMITTER 3
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+
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+#define AER_AGENT_REQUESTER_MASK(t) ((t == AER_CORRECTABLE) ? \
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+ 0 : (PCI_ERR_UNC_COMP_TIME|PCI_ERR_UNC_UNSUP))
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+#define AER_AGENT_COMPLETER_MASK(t) ((t == AER_CORRECTABLE) ? \
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+ 0 : PCI_ERR_UNC_COMP_ABORT)
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+#define AER_AGENT_TRANSMITTER_MASK(t) ((t == AER_CORRECTABLE) ? \
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+ (PCI_ERR_COR_REP_ROLL|PCI_ERR_COR_REP_TIMER) : 0)
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+
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+#define AER_GET_AGENT(t, e) \
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+ ((e & AER_AGENT_COMPLETER_MASK(t)) ? AER_AGENT_COMPLETER : \
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+ (e & AER_AGENT_REQUESTER_MASK(t)) ? AER_AGENT_REQUESTER : \
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+ (e & AER_AGENT_TRANSMITTER_MASK(t)) ? AER_AGENT_TRANSMITTER : \
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+ AER_AGENT_RECEIVER)
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+
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+#define AER_PHYSICAL_LAYER_ERROR 0
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+#define AER_DATA_LINK_LAYER_ERROR 1
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+#define AER_TRANSACTION_LAYER_ERROR 2
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+
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+#define AER_PHYSICAL_LAYER_ERROR_MASK(t) ((t == AER_CORRECTABLE) ? \
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+ PCI_ERR_COR_RCVR : 0)
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+#define AER_DATA_LINK_LAYER_ERROR_MASK(t) ((t == AER_CORRECTABLE) ? \
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+ (PCI_ERR_COR_BAD_TLP| \
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+ PCI_ERR_COR_BAD_DLLP| \
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+ PCI_ERR_COR_REP_ROLL| \
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+ PCI_ERR_COR_REP_TIMER) : PCI_ERR_UNC_DLP)
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+
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+#define AER_GET_LAYER_ERROR(t, e) \
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+ ((e & AER_PHYSICAL_LAYER_ERROR_MASK(t)) ? AER_PHYSICAL_LAYER_ERROR : \
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+ (e & AER_DATA_LINK_LAYER_ERROR_MASK(t)) ? AER_DATA_LINK_LAYER_ERROR : \
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+ AER_TRANSACTION_LAYER_ERROR)
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+
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+/*
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+ * AER error strings
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+ */
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+static const char *aer_error_severity_string[] = {
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+ "Uncorrected (Non-Fatal)",
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+ "Uncorrected (Fatal)",
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+ "Corrected"
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+};
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+
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+static const char *aer_error_layer[] = {
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+ "Physical Layer",
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+ "Data Link Layer",
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+ "Transaction Layer"
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+};
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+
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+static const char *aer_correctable_error_string[] = {
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+ "Receiver Error", /* Bit Position 0 */
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ "Bad TLP", /* Bit Position 6 */
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+ "Bad DLLP", /* Bit Position 7 */
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+ "RELAY_NUM Rollover", /* Bit Position 8 */
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+ NULL,
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+ NULL,
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+ NULL,
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+ "Replay Timer Timeout", /* Bit Position 12 */
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+ "Advisory Non-Fatal", /* Bit Position 13 */
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+ "Corrected Internal Error", /* Bit Position 14 */
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+ "Header Log Overflow", /* Bit Position 15 */
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+};
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+
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+static const char *aer_uncorrectable_error_string[] = {
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+ "Undefined", /* Bit Position 0 */
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+ NULL,
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+ NULL,
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+ NULL,
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+ "Data Link Protocol", /* Bit Position 4 */
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+ "Surprise Down Error", /* Bit Position 5 */
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ NULL,
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+ "Poisoned TLP", /* Bit Position 12 */
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+ "Flow Control Protocol", /* Bit Position 13 */
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+ "Completion Timeout", /* Bit Position 14 */
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+ "Completer Abort", /* Bit Position 15 */
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+ "Unexpected Completion", /* Bit Position 16 */
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+ "Receiver Overflow", /* Bit Position 17 */
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+ "Malformed TLP", /* Bit Position 18 */
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+ "ECRC", /* Bit Position 19 */
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+ "Unsupported Request", /* Bit Position 20 */
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+ "ACS Violation", /* Bit Position 21 */
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+ "Uncorrectable Internal Error", /* Bit Position 22 */
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+ "MC Blocked TLP", /* Bit Position 23 */
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+ "AtomicOp Egress Blocked", /* Bit Position 24 */
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+ "TLP Prefix Blocked Error", /* Bit Position 25 */
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+};
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+
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+static const char *aer_agent_string[] = {
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+ "Receiver ID",
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+ "Requester ID",
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+ "Completer ID",
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+ "Transmitter ID"
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+};
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+
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+static void __print_tlp_header(struct pci_dev *dev,
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+ struct aer_header_log_regs *t)
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+{
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+ pci_err(dev, " TLP Header: %08x %08x %08x %08x\n",
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+ t->dw0, t->dw1, t->dw2, t->dw3);
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+}
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+
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+static void __aer_print_error(struct pci_dev *dev,
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+ struct aer_err_info *info)
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+{
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+ int i, status;
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+ const char *errmsg = NULL;
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+ status = (info->status & ~info->mask);
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+
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+ for (i = 0; i < 32; i++) {
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+ if (!(status & (1 << i)))
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+ continue;
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+
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+ if (info->severity == AER_CORRECTABLE)
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+ errmsg = i < ARRAY_SIZE(aer_correctable_error_string) ?
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+ aer_correctable_error_string[i] : NULL;
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+ else
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+ errmsg = i < ARRAY_SIZE(aer_uncorrectable_error_string) ?
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+ aer_uncorrectable_error_string[i] : NULL;
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+
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+ if (errmsg)
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+ pci_err(dev, " [%2d] %-22s%s\n", i, errmsg,
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+ info->first_error == i ? " (First)" : "");
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+ else
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+ pci_err(dev, " [%2d] Unknown Error Bit%s\n",
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+ i, info->first_error == i ? " (First)" : "");
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+ }
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+}
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+
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+static void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
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+{
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+ int layer, agent;
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+ int id = ((dev->bus->number << 8) | dev->devfn);
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+
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+ if (!info->status) {
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+ pci_err(dev, "PCIe Bus Error: severity=%s, type=Inaccessible, (Unregistered Agent ID)\n",
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+ aer_error_severity_string[info->severity]);
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+ goto out;
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+ }
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+
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+ layer = AER_GET_LAYER_ERROR(info->severity, info->status);
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+ agent = AER_GET_AGENT(info->severity, info->status);
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+
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+ pci_err(dev, "PCIe Bus Error: severity=%s, type=%s, (%s)\n",
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+ aer_error_severity_string[info->severity],
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+ aer_error_layer[layer], aer_agent_string[agent]);
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+
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+ pci_err(dev, " device [%04x:%04x] error status/mask=%08x/%08x\n",
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+ dev->vendor, dev->device,
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+ info->status, info->mask);
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+
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+ __aer_print_error(dev, info);
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+
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+ if (info->tlp_header_valid)
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+ __print_tlp_header(dev, &info->tlp);
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+
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+out:
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+ if (info->id && info->error_dev_num > 1 && info->id == id)
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+ pci_err(dev, " Error of this Agent is reported first\n");
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+
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+ trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask),
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+ info->severity, info->tlp_header_valid, &info->tlp);
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+}
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+
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+static void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info)
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+{
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+ u8 bus = info->id >> 8;
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+ u8 devfn = info->id & 0xff;
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+
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+ pci_info(dev, "AER: %s%s error received: %04x:%02x:%02x.%d\n",
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+ info->multi_error_valid ? "Multiple " : "",
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+ aer_error_severity_string[info->severity],
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+ pci_domain_nr(dev->bus), bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
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+}
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+
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+#ifdef CONFIG_ACPI_APEI_PCIEAER
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+int cper_severity_to_aer(int cper_severity)
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+{
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+ switch (cper_severity) {
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+ case CPER_SEV_RECOVERABLE:
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+ return AER_NONFATAL;
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+ case CPER_SEV_FATAL:
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+ return AER_FATAL;
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+ default:
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+ return AER_CORRECTABLE;
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+ }
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+}
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+EXPORT_SYMBOL_GPL(cper_severity_to_aer);
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+
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+void cper_print_aer(struct pci_dev *dev, int aer_severity,
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+ struct aer_capability_regs *aer)
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+{
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+ int layer, agent, tlp_header_valid = 0;
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+ u32 status, mask;
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+ struct aer_err_info info;
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+
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+ if (aer_severity == AER_CORRECTABLE) {
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+ status = aer->cor_status;
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+ mask = aer->cor_mask;
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+ } else {
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+ status = aer->uncor_status;
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+ mask = aer->uncor_mask;
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+ tlp_header_valid = status & AER_LOG_TLP_MASKS;
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+ }
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+
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+ layer = AER_GET_LAYER_ERROR(aer_severity, status);
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+ agent = AER_GET_AGENT(aer_severity, status);
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+
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+ memset(&info, 0, sizeof(info));
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+ info.severity = aer_severity;
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+ info.status = status;
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+ info.mask = mask;
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+ info.first_error = PCI_ERR_CAP_FEP(aer->cap_control);
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+
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+ pci_err(dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask);
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+ __aer_print_error(dev, &info);
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+ pci_err(dev, "aer_layer=%s, aer_agent=%s\n",
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+ aer_error_layer[layer], aer_agent_string[agent]);
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+
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+ if (aer_severity != AER_CORRECTABLE)
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+ pci_err(dev, "aer_uncor_severity: 0x%08x\n",
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+ aer->uncor_severity);
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+
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+ if (tlp_header_valid)
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+ __print_tlp_header(dev, &aer->header_log);
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+
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+ trace_aer_event(dev_name(&dev->dev), (status & ~mask),
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+ aer_severity, tlp_header_valid, &aer->header_log);
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+}
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+#endif
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+
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/**
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/**
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* add_error_device - list device to be handled
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* add_error_device - list device to be handled
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* @e_info: pointer to error info
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* @e_info: pointer to error info
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