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@@ -224,7 +224,7 @@ static void cppi_controller_stop(struct cppi *controller)
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int i;
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struct musb *musb;
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- musb = controller->musb;
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+ musb = controller->controller.musb;
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tibase = controller->tibase;
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/* DISABLE INDIVIDUAL CHANNEL Interrupts */
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@@ -288,7 +288,7 @@ cppi_channel_allocate(struct dma_controller *c,
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controller = container_of(c, struct cppi, controller);
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tibase = controller->tibase;
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- musb = controller->musb;
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+ musb = c->musb;
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/* ep0 doesn't use DMA; remember cppi indices are 0..N-1 */
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index = ep->epnum - 1;
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@@ -336,7 +336,7 @@ static void cppi_channel_release(struct dma_channel *channel)
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c = container_of(channel, struct cppi_channel, channel);
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tibase = c->controller->tibase;
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if (!c->hw_ep)
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- musb_dbg(c->controller->musb,
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+ musb_dbg(c->controller->controller.musb,
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"releasing idle DMA channel %p", c);
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else if (!c->transmit)
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core_rxirq_enable(tibase, c->index + 1);
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@@ -355,7 +355,7 @@ cppi_dump_rx(int level, struct cppi_channel *c, const char *tag)
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musb_ep_select(base, c->index + 1);
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- musb_dbg(c->controller->musb,
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+ musb_dbg(c->controller->controller.musb,
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"RX DMA%d%s: %d left, csr %04x, "
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"%08x H%08x S%08x C%08x, "
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"B%08x L%08x %08x .. %08x",
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@@ -385,7 +385,7 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag)
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musb_ep_select(base, c->index + 1);
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- musb_dbg(c->controller->musb,
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+ musb_dbg(c->controller->controller.musb,
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"TX DMA%d%s: csr %04x, "
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"H%08x S%08x C%08x %08x, "
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"F%08x L%08x .. %08x",
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@@ -954,7 +954,7 @@ static int cppi_channel_program(struct dma_channel *ch,
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cppi_ch = container_of(ch, struct cppi_channel, channel);
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controller = cppi_ch->controller;
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- musb = controller->musb;
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+ musb = controller->controller.musb;
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switch (ch->status) {
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case MUSB_DMA_STATUS_BUS_ABORT:
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@@ -1009,7 +1009,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
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int i;
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dma_addr_t safe2ack;
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void __iomem *regs = rx->hw_ep->regs;
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- struct musb *musb = cppi->musb;
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+ struct musb *musb = cppi->controller.musb;
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cppi_dump_rx(6, rx, "/K");
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@@ -1121,7 +1121,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
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* setting it here "should" be racey, but seems to work
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*/
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csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
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- if (is_host_active(cppi->musb)
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+ if (is_host_active(cppi->controller.musb)
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&& bd
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&& !(csr & MUSB_RXCSR_H_REQPKT)) {
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csr |= MUSB_RXCSR_H_REQPKT;
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@@ -1311,7 +1311,7 @@ cppi_dma_controller_create(struct musb *musb, void __iomem *mregs)
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controller->mregs = mregs;
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controller->tibase = mregs - DAVINCI_BASE_OFFSET;
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- controller->musb = musb;
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+ controller->controller.musb = musb;
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controller->controller.channel_alloc = cppi_channel_allocate;
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controller->controller.channel_release = cppi_channel_release;
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controller->controller.channel_program = cppi_channel_program;
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@@ -1323,7 +1323,7 @@ cppi_dma_controller_create(struct musb *musb, void __iomem *mregs)
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/* setup BufferPool */
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controller->pool = dma_pool_create("cppi",
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- controller->musb->controller,
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+ controller->controller.musb->controller,
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sizeof(struct cppi_descriptor),
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CPPI_DESCRIPTOR_ALIGN, 0);
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if (!controller->pool) {
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@@ -1357,7 +1357,7 @@ void cppi_dma_controller_destroy(struct dma_controller *c)
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cppi_controller_stop(cppi);
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if (cppi->irq)
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- free_irq(cppi->irq, cppi->musb);
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+ free_irq(cppi->irq, cppi->controller.musb);
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/* assert: caller stopped the controller first */
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dma_pool_destroy(cppi->pool);
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@@ -1469,7 +1469,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
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core_rxirq_disable(tibase, cppi_ch->index + 1);
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/* for host, ensure ReqPkt is never set again */
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- if (is_host_active(cppi_ch->controller->musb)) {
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+ if (is_host_active(cppi_ch->controller->controller.musb)) {
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value = musb_readl(tibase, DAVINCI_AUTOREQ_REG);
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value &= ~((0x3) << (cppi_ch->index * 2));
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musb_writel(tibase, DAVINCI_AUTOREQ_REG, value);
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@@ -1478,7 +1478,7 @@ static int cppi_channel_abort(struct dma_channel *channel)
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csr = musb_readw(regs, MUSB_RXCSR);
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/* for host, clear (just) ReqPkt at end of current packet(s) */
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- if (is_host_active(cppi_ch->controller->musb)) {
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+ if (is_host_active(cppi_ch->controller->controller.musb)) {
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csr |= MUSB_RXCSR_H_WZC_BITS;
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csr &= ~MUSB_RXCSR_H_REQPKT;
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} else
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