clk/samsung: exynos5433: add pclk_decon clock

This undocumented gate clock is used by DECON IP.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

drivers/clk/samsung/clk-exynos5433.c

@@ -2822,6 +2822,8 @@ static struct samsung_gate_clock disp_gate_clks[] __initdata = {
 			ENABLE_PCLK_DISP, 2, 0, 0),
 	GATE(CLK_PCLK_DECON_TV, "pclk_decon_tv", "div_pclk_disp",
 			ENABLE_PCLK_DISP, 1, 0, 0),
+	GATE(CLK_PCLK_DECON, "pclk_decon", "div_pclk_disp",
+			ENABLE_PCLK_DISP, 0, 0, 0),
 
 	/* ENABLE_SCLK_DISP */
 	GATE(CLK_PHYCLK_MIPIDPHY1_BITCLKDIV8, "phyclk_mipidphy1_bitclkdiv8",

include/dt-bindings/clock/exynos5433.h

@@ -768,7 +768,9 @@
 #define CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY		111
 #define CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY		112
 
-#define DISP_NR_CLK					113
+#define CLK_PCLK_DECON					113
+
+#define DISP_NR_CLK					114
 
 /* CMU_AUD */
 #define CLK_MOUT_AUD_PLL_USER				1