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@@ -61,6 +61,13 @@
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*/
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#define NR_DESCS_PER_CHANNEL 64
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+/* The set of bus widths supported by the DMA controller */
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+#define DW_DMA_BUSWIDTHS \
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+ BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
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+ BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
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+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
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+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES)
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+
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/*----------------------------------------------------------------------*/
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static struct device *chan2dev(struct dma_chan *chan)
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@@ -1660,8 +1667,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->dma.device_free_chan_resources = dwc_free_chan_resources;
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dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy;
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-
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dw->dma.device_prep_slave_sg = dwc_prep_slave_sg;
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+
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dw->dma.device_config = dwc_config;
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dw->dma.device_pause = dwc_pause;
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dw->dma.device_resume = dwc_resume;
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@@ -1670,6 +1677,13 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
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dw->dma.device_tx_status = dwc_tx_status;
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dw->dma.device_issue_pending = dwc_issue_pending;
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+ /* DMA capabilities */
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+ dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS;
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+ dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS;
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+ dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) |
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+ BIT(DMA_MEM_TO_MEM);
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+ dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
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+
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err = dma_async_device_register(&dw->dma);
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if (err)
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goto err_dma_register;
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