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@@ -6401,6 +6401,36 @@ static inline void mlxsw_reg_mgpc_pack(char *payload, u32 counter_index,
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mlxsw_reg_mgpc_opcode_set(payload, opcode);
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}
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+/* TIGCR - Tunneling IPinIP General Configuration Register
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+ * -------------------------------------------------------
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+ * The TIGCR register is used for setting up the IPinIP Tunnel configuration.
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+ */
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+#define MLXSW_REG_TIGCR_ID 0xA801
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+#define MLXSW_REG_TIGCR_LEN 0x10
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+
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+MLXSW_REG_DEFINE(tigcr, MLXSW_REG_TIGCR_ID, MLXSW_REG_TIGCR_LEN);
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+
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+/* reg_tigcr_ipip_ttlc
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+ * For IPinIP Tunnel encapsulation: whether to copy the ttl from the packet
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+ * header.
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+ * Access: RW
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+ */
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+MLXSW_ITEM32(reg, tigcr, ttlc, 0x04, 8, 1);
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+
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+/* reg_tigcr_ipip_ttl_uc
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+ * The TTL for IPinIP Tunnel encapsulation of unicast packets if
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+ * reg_tigcr_ipip_ttlc is unset.
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+ * Access: RW
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+ */
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+MLXSW_ITEM32(reg, tigcr, ttl_uc, 0x04, 0, 8);
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+
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+static inline void mlxsw_reg_tigcr_pack(char *payload, bool ttlc, u8 ttl_uc)
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+{
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+ MLXSW_REG_ZERO(tigcr, payload);
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+ mlxsw_reg_tigcr_ttlc_set(payload, ttlc);
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+ mlxsw_reg_tigcr_ttl_uc_set(payload, ttl_uc);
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+}
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+
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/* SBPR - Shared Buffer Pools Register
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* -----------------------------------
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* The SBPR configures and retrieves the shared buffer pools and configuration.
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@@ -6881,6 +6911,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
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MLXSW_REG(mcc),
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MLXSW_REG(mcda),
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MLXSW_REG(mgpc),
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+ MLXSW_REG(tigcr),
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MLXSW_REG(sbpr),
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MLXSW_REG(sbcm),
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MLXSW_REG(sbpm),
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