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@@ -152,13 +152,17 @@ static struct nand_hw_control omap_gpmc_controller = {
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};
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};
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struct omap_nand_info {
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struct omap_nand_info {
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- struct omap_nand_platform_data *pdata;
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struct nand_chip nand;
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struct nand_chip nand;
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struct platform_device *pdev;
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struct platform_device *pdev;
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int gpmc_cs;
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int gpmc_cs;
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- unsigned long phys_base;
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+ bool dev_ready;
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+ enum nand_io xfer_type;
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+ int devsize;
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enum omap_ecc ecc_opt;
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enum omap_ecc ecc_opt;
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+ struct device_node *elm_of_node;
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+
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+ unsigned long phys_base;
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struct completion comp;
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struct completion comp;
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struct dma_chan *dma;
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struct dma_chan *dma;
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int gpmc_irq_fifo;
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int gpmc_irq_fifo;
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@@ -1631,7 +1635,7 @@ static bool omap2_nand_ecc_check(struct omap_nand_info *info,
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"CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
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"CONFIG_MTD_NAND_OMAP_BCH not enabled\n");
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return false;
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return false;
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}
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}
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- if (ecc_needs_elm && !is_elm_present(info, pdata->elm_of_node)) {
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+ if (ecc_needs_elm && !is_elm_present(info, info->elm_of_node)) {
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dev_err(&info->pdev->dev, "ELM not available\n");
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dev_err(&info->pdev->dev, "ELM not available\n");
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return false;
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return false;
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}
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}
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@@ -1675,6 +1679,11 @@ static int omap_nand_probe(struct platform_device *pdev)
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info->gpmc_cs = pdata->cs;
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info->gpmc_cs = pdata->cs;
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info->of_node = pdata->of_node;
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info->of_node = pdata->of_node;
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info->ecc_opt = pdata->ecc_opt;
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info->ecc_opt = pdata->ecc_opt;
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+ info->dev_ready = pdata->dev_ready;
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+ info->xfer_type = pdata->xfer_type;
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+ info->devsize = pdata->devsize;
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+ info->elm_of_node = pdata->elm_of_node;
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+
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nand_chip = &info->nand;
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nand_chip = &info->nand;
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mtd = nand_to_mtd(nand_chip);
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mtd = nand_to_mtd(nand_chip);
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mtd->dev.parent = &pdev->dev;
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mtd->dev.parent = &pdev->dev;
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@@ -1700,7 +1709,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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* chip delay which is slightly more than tR (AC Timing) of the NAND
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* chip delay which is slightly more than tR (AC Timing) of the NAND
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* device and read status register until you get a failure or success
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* device and read status register until you get a failure or success
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*/
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*/
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- if (pdata->dev_ready) {
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+ if (info->dev_ready) {
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nand_chip->dev_ready = omap_dev_ready;
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nand_chip->dev_ready = omap_dev_ready;
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nand_chip->chip_delay = 0;
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nand_chip->chip_delay = 0;
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} else {
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} else {
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@@ -1714,15 +1723,16 @@ static int omap_nand_probe(struct platform_device *pdev)
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nand_chip->options |= NAND_SKIP_BBTSCAN;
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nand_chip->options |= NAND_SKIP_BBTSCAN;
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/* scan NAND device connected to chip controller */
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/* scan NAND device connected to chip controller */
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- nand_chip->options |= pdata->devsize & NAND_BUSWIDTH_16;
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+ nand_chip->options |= info->devsize & NAND_BUSWIDTH_16;
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if (nand_scan_ident(mtd, 1, NULL)) {
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if (nand_scan_ident(mtd, 1, NULL)) {
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- dev_err(&info->pdev->dev, "scan failed, may be bus-width mismatch\n");
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+ dev_err(&info->pdev->dev,
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+ "scan failed, may be bus-width mismatch\n");
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err = -ENXIO;
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err = -ENXIO;
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goto return_error;
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goto return_error;
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}
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}
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/* re-populate low-level callbacks based on xfer modes */
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/* re-populate low-level callbacks based on xfer modes */
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- switch (pdata->xfer_type) {
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+ switch (info->xfer_type) {
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case NAND_OMAP_PREFETCH_POLLED:
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case NAND_OMAP_PREFETCH_POLLED:
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nand_chip->read_buf = omap_read_buf_pref;
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nand_chip->read_buf = omap_read_buf_pref;
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nand_chip->write_buf = omap_write_buf_pref;
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nand_chip->write_buf = omap_write_buf_pref;
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@@ -1802,7 +1812,7 @@ static int omap_nand_probe(struct platform_device *pdev)
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default:
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default:
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dev_err(&pdev->dev,
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dev_err(&pdev->dev,
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- "xfer_type(%d) not supported!\n", pdata->xfer_type);
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+ "xfer_type(%d) not supported!\n", info->xfer_type);
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err = -EINVAL;
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err = -EINVAL;
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goto return_error;
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goto return_error;
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}
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}
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