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ARM: zynq: Split slcr in two parts

Split the slcr into an early part for unlocking and cpu starting
and a later syscon driver.
Also add "syscon" compatible property for slcr.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek %!s(int64=11) %!d(string=hai) anos
pai
achega
016f4dcae8

+ 1 - 1
arch/arm/boot/dts/zynq-7000.dtsi

@@ -123,7 +123,7 @@
 		} ;
 		} ;
 
 
 		slcr: slcr@f8000000 {
 		slcr: slcr@f8000000 {
-			compatible = "xlnx,zynq-slcr";
+			compatible = "xlnx,zynq-slcr", "syscon";
 			reg = <0xF8000000 0x1000>;
 			reg = <0xF8000000 0x1000>;
 
 
 			clocks {
 			clocks {

+ 1 - 0
arch/arm/mach-zynq/Kconfig

@@ -14,5 +14,6 @@ config ARCH_ZYNQ
 	select SPARSE_IRQ
 	select SPARSE_IRQ
 	select CADENCE_TTC_TIMER
 	select CADENCE_TTC_TIMER
 	select ARM_GLOBAL_TIMER
 	select ARM_GLOBAL_TIMER
+	select MFD_SYSCON
 	help
 	help
 	  Support for Xilinx Zynq ARM Cortex A9 Platform
 	  Support for Xilinx Zynq ARM Cortex A9 Platform

+ 3 - 1
arch/arm/mach-zynq/common.c

@@ -59,11 +59,13 @@ static void __init zynq_init_machine(void)
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 
 
 	platform_device_register(&zynq_cpuidle_device);
 	platform_device_register(&zynq_cpuidle_device);
+
+	zynq_slcr_init();
 }
 }
 
 
 static void __init zynq_timer_init(void)
 static void __init zynq_timer_init(void)
 {
 {
-	zynq_slcr_init();
+	zynq_early_slcr_init();
 
 
 	zynq_clock_init(zynq_slcr_base);
 	zynq_clock_init(zynq_slcr_base);
 	clocksource_of_init();
 	clocksource_of_init();

+ 1 - 0
arch/arm/mach-zynq/common.h

@@ -20,6 +20,7 @@
 void zynq_secondary_startup(void);
 void zynq_secondary_startup(void);
 
 
 extern int zynq_slcr_init(void);
 extern int zynq_slcr_init(void);
+extern int zynq_early_slcr_init(void);
 extern void zynq_slcr_system_reset(void);
 extern void zynq_slcr_system_reset(void);
 extern void zynq_slcr_cpu_stop(int cpu);
 extern void zynq_slcr_cpu_stop(int cpu);
 extern void zynq_slcr_cpu_start(int cpu);
 extern void zynq_slcr_cpu_start(int cpu);

+ 24 - 2
arch/arm/mach-zynq/slcr.c

@@ -15,7 +15,9 @@
  */
  */
 
 
 #include <linux/io.h>
 #include <linux/io.h>
+#include <linux/mfd/syscon.h>
 #include <linux/of_address.h>
 #include <linux/of_address.h>
+#include <linux/regmap.h>
 #include <linux/clk/zynq.h>
 #include <linux/clk/zynq.h>
 #include "common.h"
 #include "common.h"
 
 
@@ -30,6 +32,7 @@
 #define SLCR_A9_CPU_RST			0x1
 #define SLCR_A9_CPU_RST			0x1
 
 
 void __iomem *zynq_slcr_base;
 void __iomem *zynq_slcr_base;
+static struct regmap *zynq_slcr_regmap;
 
 
 /**
 /**
  * zynq_slcr_system_reset - Reset the entire system.
  * zynq_slcr_system_reset - Reset the entire system.
@@ -80,12 +83,31 @@ void zynq_slcr_cpu_stop(int cpu)
 }
 }
 
 
 /**
 /**
- * zynq_slcr_init
- * Returns 0 on success, negative errno otherwise.
+ * zynq_slcr_init - Regular slcr driver init
+ *
+ * Return:	0 on success, negative errno otherwise.
  *
  *
  * Called early during boot from platform code to remap SLCR area.
  * Called early during boot from platform code to remap SLCR area.
  */
  */
 int __init zynq_slcr_init(void)
 int __init zynq_slcr_init(void)
+{
+	zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");
+	if (IS_ERR(zynq_slcr_regmap)) {
+		pr_err("%s: failed to find zynq-slcr\n", __func__);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+/**
+ * zynq_early_slcr_init - Early slcr init function
+ *
+ * Return:	0 on success, negative errno otherwise.
+ *
+ * Called very early during boot from platform code to unlock SLCR.
+ */
+int __init zynq_early_slcr_init(void)
 {
 {
 	struct device_node *np;
 	struct device_node *np;